Maker Pro
Maker Pro

Voltage controlled thru opamp playing up?

Arouse1973

Adam
Dec 18, 2013
5,178
Joined
Dec 18, 2013
Messages
5,178
The RC time constant for all the 56K resistors and the last 4.7nF is 798us and your off time is 647us. I think that the last capacitor is basically not being given enough time to discharge before the next pulse comes along and tops up the cap. This is giving you a higher average than you expect. I'll do some more on it and let you know.
Adam
 

Arouse1973

Adam
Dec 18, 2013
5,178
Joined
Dec 18, 2013
Messages
5,178
Hi mike
Still working on it. Looking at capacitor constant current driver and a peak detector. Got something sort of working. Give me the weekend ish.
Adam
 

KrisBlueNZ

Sadly passed away in 2015
Nov 28, 2011
8,393
Joined
Nov 28, 2011
Messages
8,393
You don't need anything special to convert a PWM signal into a voltage that corresponds to the duty cycle; just one or more cascaded R-C circuits, as the OP has done.

diagnostix:

1. Do you still have the same problem with the translation from input to output voltage?
2. Can you post the schematic of the circuit you are working with?
3. Can you post the code you are currently using?

I think the best approach is to add some debug code as I described in post #24, paragraphs 2 and 3.
 

Arouse1973

Adam
Dec 18, 2013
5,178
Joined
Dec 18, 2013
Messages
5,178
Hi Kris I would be interested to see your implementation of the RC network that worked over the entire range.
Cheers
Adam
 

KrisBlueNZ

Sadly passed away in 2015
Nov 28, 2011
8,393
Joined
Nov 28, 2011
Messages
8,393
Code:
PWM ------\/\/\/\/------ op-amp_buffer ------ output
                    |
                  -----
                  -----
                    |
------------------------------------------------------- 0V
 

Arouse1973

Adam
Dec 18, 2013
5,178
Joined
Dec 18, 2013
Messages
5,178
Here you go. Might look a bit complex but it's not really. Just a constant current cap charger with peak detector with Vbe cancelation. Pictures show working with 19% and 38% DC. Stable enough to bang straight into A to D if you wanted to. You might have to tweak the components for the desired response time. Just another way to do things. But when Kris has time he might be able to show you a way with RC networks that are good enough for what you want. I can't wait to try his circuit ideas if he has time.
Cheers
Adam
 

Attachments

  • PWM2.PNG
    PWM2.PNG
    8.5 KB · Views: 89
  • PWM1.PNG
    PWM1.PNG
    8.9 KB · Views: 119
  • PWM3.PNG
    PWM3.PNG
    8.3 KB · Views: 82

Arouse1973

Adam
Dec 18, 2013
5,178
Joined
Dec 18, 2013
Messages
5,178
Code:
PWM ------\/\/\/\/------ op-amp_buffer ------ output
                    |
                  -----
                  -----
                    |
------------------------------------------------------- 0V
What's with all this 1960's way of drawing circuits :) Any values Kris?
Cheers
Adam
 

KrisBlueNZ

Sadly passed away in 2015
Nov 28, 2011
8,393
Joined
Nov 28, 2011
Messages
8,393
What's with all this 1960's way of drawing circuits
It's called "ASCII art". You will see it in many posts on this site and others. It began in the 1980s as a simple and quick way to draw diagrams that were so simple that a proper graphical drawing wasn't worthwhile. It's also easy to quote. It's less common now because text is normally displayed in proportional fonts, so things don't line up reliably unless you force a monospaced font, and graphical drawing tools and image manipulation are a lot easier nowadays. But it still has its place for answering simple questions.
Any values Kris?
t = R C. The optimum time constant depends on the PWM frequency, the tracking speed (time to settle after a change), and the amount of ripple that can be tolerated. There is naturally a compromise between the last two characteristics - heavier filtering means less ripple, but slower response to changes. Performance in this respect can be improved by using distributed PWM (DPWM) with a shorter time constant, but the PIC doesn't support DPWM. It can be implemented fairly easily in an FPGA though.

BTW regarding your design in post #46. I think I see what you're trying to achieve. It's an interesting idea and could give significantly improved performance over the simple R-C smoother if you used a sample-and-hold circuit, but I've never seen that technique used in practice. Probably because of the cost, size, variability with temperature, and the need for calibration. An engineer would just spend a few more cents on a microcontroller with a built-in DAC. And that could be good advice for the OP on this thread too. But it's an interesting idea nonetheless.
 
Top