What voltages can you put on FET inputs of unpowered chips?

[Michael]

Hi there - I'm working on designing a circuit that uses a LT1540
(datasheet here: http://www.linear.com/pc/downloadDocument.do?navId=H0,C1,C1154,C1004,C1139,P1593,D1777).
I was just about to call it good when I noticed that the absolute
maximum ratings for the IN+ pin is V+ + 0.3V. I had been planning on
there being times where the chip is not powered (V+ = 0V) but a
voltage ranging from about 5-7.5V would be on the IN+ pin. Am I going
to release the magic smoke from this chip?

Thanks!

-Michael

 

[Eeyore]

Hi there - I'm working on designing a circuit that uses a LT1540
(datasheet here: http://www.linear.com/pc/downloadDocument.do?navId=H0,C1,C1154,C1004,C1139,P1593,D1777).
I was just about to call it good when I noticed that the absolute
maximum ratings for the IN+ pin is V+ + 0.3V. I had been planning on
there being times where the chip is not powered (V+ = 0V) but a
voltage ranging from about 5-7.5V would be on the IN+ pin. Am I going
to release the magic smoke from this chip?

There will almost certainly be a protection diode to V+ associated with that input. What will happen is the
chip will draw current from the signal.

It is poor practice to have active signals feeding unpowered circuitry. Can you fix this ?

Graham

 

[Michael]

There will almost certainly be a protection diode to V+ associated with that input. What will happen is the
chip will draw current from the signal.

It is poor practice to have active signals feeding unpowered circuitry. Can you fix this ?

Graham

Yes - in fact I fixed it before I made the post. It just made me
curious though. Is there any way to know for sure, or do you just make
the assumption?

Thanks,

-Michael

 

[Eeyore]

Yes - in fact I fixed it before I made the post. It just made me
curious though. Is there any way to know for sure, or do you just make
the assumption?

Most ICs have this diode whether it be intentional or parasitic (by construction).

Graham

 

[Joerg]

Yes - in fact I fixed it before I made the post. It just made me
curious though. Is there any way to know for sure, or do you just make
the assumption?

The datasheet says that the substrate diodes can take 20mA abs max. If
in doubt it is always good policy to verify such a mode of operation
with an application engineer at the manufacturer. I've run stuff into
substrate diodes a lot, never any problems. There are cases where you
just have to.

I disagree with Graham on the "poor practice" thing but he correctly
pointed out one caveat: When you run signals into the substrate diodes
the current tries to power up the supply rail. This needs to be taken
into account. For example you wouldn't want a weak (and acceptable)
current run into the substrate and then the voltage gradually exceeds
the abs max limit ... bzzzt.

 

[Eeyore]

I disagree with Graham on the "poor practice" thing but he correctly
pointed out one caveat: When you run signals into the substrate diodes
the current tries to power up the supply rail. This needs to be taken
into account. For example you wouldn't want a weak (and acceptable)
current run into the substrate and then the voltage gradually exceeds
the abs max limit ... bzzzt.

But that's exactly why I call it poor practice.

I appreciate that it can be made to do useful things with care but that's another story.

Graham

 

[Joerg]

But that's exactly why I call it poor practice.

There is a very cheap insurance policy available here: A TL431. Or a
zener if five cents is too much money ;-)

I appreciate that it can be made to do useful things with care but that's another story.

That's the "art" in electronics, to paraphrase Win's book.

 

[Adrian Jansen]

The datasheet says that the substrate diodes can take 20mA abs max. If
in doubt it is always good policy to verify such a mode of operation
with an application engineer at the manufacturer. I've run stuff into
substrate diodes a lot, never any problems. There are cases where you
just have to.

I disagree with Graham on the "poor practice" thing but he correctly
pointed out one caveat: When you run signals into the substrate diodes
the current tries to power up the supply rail. This needs to be taken
into account. For example you wouldn't want a weak (and acceptable)
current run into the substrate and then the voltage gradually exceeds
the abs max limit ... bzzzt.

Just recently had to deal with this, and it can be difficult.
I have two processors and a SD memory card ( and other stuff ) commoned
onto an SPI bus ( CLK, MISO, MOSI lines ). The chip selects from each
processor are ANDed through a gate and the output to the CS of the SD
card. So we can read/write from either processor to the card. One
processor also has a line controlling the power supply to the card, so
we can power it down when not in use.
So on system power up there is a short time where the inputs to the card
might float high, before the processors get control of the lines. That
was ( sometimes ) powering up the card via its internal diodes, and even
when the card supply voltage was down at 0.6 volts, the card would stay
in a latch-up state, draw lots of current when powered up, and never
recover.
Eventually we found we could put a discharge resistor across the card
power supply and allow to drain down to < 0.4 volts, then power up with
everything else settled down, and it would work ok. Took some finding
though.

--
Regards,

Adrian Jansen adrianjansen at internode dot on dot net
Design Engineer J & K Micro Systems
Microcomputer solutions for industrial control
Note reply address is invalid, convert address above to machine form.

 

[Allan Herriman]

Hi there - I'm working on designing a circuit that uses a LT1540
(datasheet here: http://www.linear.com/pc/downloadDocument.do?navId=H0,C1,C1154,C1004,C1139,P1593,D1777).
I was just about to call it good when I noticed that the absolute
maximum ratings for the IN+ pin is V+ + 0.3V. I had been planning on
there being times where the chip is not powered (V+ = 0V) but a
voltage ranging from about 5-7.5V would be on the IN+ pin. Am I going
to release the magic smoke from this chip?

Not an answer to your question, but back in the '80s I did a similar
thing with P-CH JFET input opamps, of the LF356 ilk.
In my case, the opamp was wired as a voltage follower to buffer a
battery voltage to an ADC, and I didn't want the battery loaded when
the main supply was off. The opamp + input was 3V above its positive
supply, and I couldn't measure any current.

Regards,
Allan