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Where to buy high purity semiconductors?

I would like to purchase low quantities of high purity semiconductors,
such as Si and GaAs. I'll have the material doped, for dopant
densities ranging from as low as 5e-18 to 5e-15 /cm^3.

Thanks for any links and references,
Anon
 
E

Eeyore

Jan 1, 1970
0
I would like to purchase low quantities of high purity semiconductors,
such as Si and GaAs. I'll have the material doped, for dopant
densities ranging from as low as 5e-18 to 5e-15 /cm^3.

Thanks for any links and references,

I've used Google for such things.

What size wafers are you looking for ?

Graham
 
I've used Google for such things.

What size wafers are you looking for ?

Graham


As odd as this may sound, it's a garage project of mine. Nothing to do
with school, I'm well over 40. I have the background to build a simple
setup to vacuum deposit heated atoms under an electric field. The
intent is nothing more than person interest and educational
entertainment. The goal is to build a few custom transistors. Perhaps
a small circuit eventually. Anyhow, as far as semiconductor
fabrication, what I know is just the basics, no real details. So on
that note, may I ask how sensitive such wafers are to air exposure?
I've seen 6" diameter 99.9999% pure Si wafers sold on ebay for about
$10 to $40. Lets say I buy one of these. Put it inside the vacuum
chamber. Then what? Clean the wafer with chemicals? Here's the
design. I'm sure you've seen this type of design before, as crude as
it may be. A piece of Si is on a hot plate in a high electric field in
a vacuum. Across from the silicon is a PCB, printed circuit board.
Between the PCB and silicon is a thin plate with a small pin hole, a
few micrometers in diameter. Some of the heated silicon atoms are
ejected off the hot plate and travel through the pin hole, stick on
the cold PCB. OK, so after some time we have a small area of coated
pure silicon on a PCB, or that's the idea. We can place silicon atoms
any place on the PCB by moving it. I'd like to control the PCB
movement through computer software. I've done this type of stuff
before, not the semiconductor fabrication, but electronic circuits
controlled by software.

As far as doping the silicon, another hot plate containing boron would
sit next to the silicon.

It will be an adventure, something I've always wanted to do. Please,
any advice, tips? Is 10 Pa vacuum pressure low enough? From what
I've been able to find online, 10KV DC might be a good start. No idea
how hot the silicon should be, and no idea how cold the PCB should be.

Thanks,
Anon
 
As odd as this may sound, it's a garage project of mine. Nothing to do
with school, I'm well over 40. I have the background to build a simple
setup to vacuum deposit heated atoms under an electric field. The
intent is nothing more than person interest and educational
entertainment. The goal is to build a few custom transistors. Perhaps
a small circuit eventually. Anyhow, as far as semiconductor
fabrication, what I know is just the basics, no real details. So on
that note, may I ask how sensitive such wafers are to air exposure?
I've seen 6" diameter 99.9999% pure Si wafers sold on ebay for about
$10 to $40. Lets say I buy one of these. Put it inside the vacuum
chamber. Then what?  Clean the wafer with chemicals?  Here's the
design. I'm sure you've seen this type of design before, as crude as
it may be. A piece of Si is on a hot plate in a high electric field in
a vacuum. Across from the silicon is a PCB, printed circuit board.
Between the PCB and silicon is a thin plate with a small pin hole, a
few micrometers in diameter. Some of the heated silicon atoms are
ejected off the hot plate and travel through the pin hole, stick on
the cold PCB. OK, so after some time we have a small area of coated
pure silicon on a PCB, or that's the idea. We can place silicon atoms
any place on the PCB by moving it.  I'd like to control the PCB
movement through computer software. I've done this type of stuff
before, not the semiconductor fabrication, but electronic circuits
controlled by software.

As far as doping the silicon, another hot plate containing boron would
sit next to the silicon.

It will be an adventure, something I've always wanted to do.  Please,
any advice, tips?  Is 10 Pa vacuum pressure low enough?  From what
I've been able to find online, 10KV DC might be a good start. No idea
how hot the silicon should be, and no idea how cold the PCB should be.

Thanks,
Anon

I took a class in semiconductor processing that had a lab. Though the
fab had an ion implanter, this was off-limits for mere students. Nor
did we use traditional gases. What we did do was place the wafers to
be processed between heavily doped wafers of the desired impurity,
then cranks up the oven. This seemed pretty hair-brained to me, but it
worked. It was a PMOS process.

Personally, if you really for some reason have a hankering for making
a chip, I'd suggest dealing with
http://www.mosis.com/
You can get all the software tools for free if you have linux.

You could probably build your own Al sputtering system. The one in our
fab was pretty mundane. An e-beam hits the target and the Al goes
flying. Metal thickness was measure by detecting the frequency shift
of a crystal whose surface got the same sputtering treatment.

I have to say that nothing in the fab was home brew, but rather hand
me downs from anonymous semiconductor companies. That is, we used a
real mask aligner, spinned on resist, etc., like a fab about a decade
out of date. Mask aligning by hand was not easy.
 
A few things to think about:

1. Neutral atoms don't get accelerated by a uniform electric field.

2. Assuming you make an ion beam instead, it's at least as likely to
remove a small amount of the PCB as deposit anything. (Google 'ion
milling'.)

3. In order to make a molecular beam, you'll need to be well below
10**-6 torr. For a small vacuum system, that means an ion pump or a
turbo. You can't put FR4 board in a high vacuum system and have it stay
high vacuum.

4. It would be much easier to do the processing on the silicon, e.g. by
high temperature diffusion. Even a point-contact transistor will have
better performance than an amorphous-Si thin film device. a-Si TFTs are
used in displays.

5. There are a lot more things wrong with this scheme--processing is
hard, and good processing doesn't happen by accident.

6. It's quite possible to build a small bell-jar evaporator at home.
You can do this with a thermal evaporation source--an alumina-coated
boat could deposit decent amorphous silicon for you. Check out John
Strong's "Procedures in Experimental Physics", which iirc is still
available from Lindsay Publications for fairly cheap. "Building
Scientific Apparatus" also has some good vacuum info. Don't skimp on
the gauges, or you'll never get consistent results. Also don't use an
oil diffusion pump unless you also have a liquid nitrogen cold trap.

Cheers,

Phil Hobbs- Hide quoted text -

- Show quoted text -


That's a wealth of appreciated info. Lots to think about. I was a bit
surprised to read of amorphous-Si poor performance. Perhaps the best
Si performance would be mono-crystalline. What would be the simplest
garage project design to make high performance semiconductors, not
amorphous-Si? A personal goal is high performance schottky contact
pads on the order of a few micrometers in diameter, perhaps better
over time.

OK, my design was flawed, amorphous-Si is not good. I'm confused now.
How about the following design of fabricating high performance
semiconductor chips. Take an electrically insulated wafer (SiO2?),
apply photoresist, use UV light to lift the desired photoresist, coat
with doped silicon, then lift the remaining photoresist. Does that
sound like a viable method? The only thing I don't care about that
design is I have no idea how to make or where to buy doped silicon.

Thanks for any help. I need it!
Anon
 
Thanks for any help. I need it!
Anon

Sounds like fun. You could also have a tiny market for people who
would like to have obsolete parts like tunnel diodes for their hobby
scopes. I wonder if you could make tunnel diodes if you had a well-
equipped garage like you seem to be aiming for.
 
A few things to think about:

1.  Neutral atoms don't get accelerated by a uniform electric field.

2.  Assuming you make an ion beam instead, it's at least as likely to
remove a small amount of the PCB as deposit anything.  (Google 'ion
milling'.)

3.  In order to make a molecular beam, you'll need to be well below
10**-6 torr.  For a small vacuum system, that means an ion pump or a
turbo.  You can't put FR4 board in a high vacuum system and have it stay
high vacuum.

4.  It would be much easier to do the processing on the silicon, e.g. by
high temperature diffusion.  Even a point-contact transistor will have
better performance than an amorphous-Si thin film device.  a-Si TFTs are
used in displays.

5.  There are a lot more things wrong with this scheme--processing is
hard, and good processing doesn't happen by accident.

6.  It's quite possible to build a small bell-jar evaporator at home.
You can do this with a thermal evaporation source--an alumina-coated
boat could deposit decent amorphous silicon for you.  Check out John
Strong's "Procedures in Experimental Physics", which iirc is still
available from Lindsay Publications for fairly cheap.  "Building
Scientific Apparatus" also has some good vacuum info.  Don't skimp on
the gauges, or you'll never get consistent results.  Also don't use an
oil diffusion pump unless you also have a liquid nitrogen cold trap.

Cheers,

Phil Hobbs- Hide quoted text -

- Show quoted text -


What I don't understand is what good are those 6" diameter pure Si
wafers. They are solid pure silicon. If you deposit on that then the
entire chip is on pure silicon. Wouldn't all of that silicon short out
everything? I don't get it yet.

Thanks,
Anon
 
A few things to think about:

1. Neutral atoms don't get accelerated by a uniform electric field.

2. Assuming you make an ion beam instead, it's at least as likely to
remove a small amount of the PCB as deposit anything. (Google 'ion
milling'.)

3. In order to make a molecular beam, you'll need to be well below
10**-6 torr. For a small vacuum system, that means an ion pump or a
turbo. You can't put FR4 board in a high vacuum system and have it stay
high vacuum.

4. It would be much easier to do the processing on the silicon, e.g. by
high temperature diffusion. Even a point-contact transistor will have
better performance than an amorphous-Si thin film device. a-Si TFTs are
used in displays.

5. There are a lot more things wrong with this scheme--processing is
hard, and good processing doesn't happen by accident.

6. It's quite possible to build a small bell-jar evaporator at home.
You can do this with a thermal evaporation source--an alumina-coated
boat could deposit decent amorphous silicon for you. Check out John
Strong's "Procedures in Experimental Physics", which iirc is still
available from Lindsay Publications for fairly cheap. "Building
Scientific Apparatus" also has some good vacuum info. Don't skimp on
the gauges, or you'll never get consistent results. Also don't use an
oil diffusion pump unless you also have a liquid nitrogen cold trap.

Cheers,

Phil Hobbs- Hide quoted text -

- Show quoted text -


This may be the hot ticker. I read on wikipedia most semiconductor
chips use Polycrystalline silicon. I'm guessing Polycrystalline
silicon will make high performance components. Wikipedia says,

"Polycrystalline silicon is deposited from silane (SiH4), using the
following reaction:SiH4 --> Si + 2H2. This reaction is usually
performed in LPCVD systems, with either pure silane feedstock, or a
solution of silane with 70-80% nitrogen. Temperatures between 600 and
650 °C and pressures between 25 and 150 Pa yield a growth rate between
10 and 20 nm per minute. ... Polysilicon may be grown directly with
doping, if gases such as phosphine, arsine or diborane are added to
the CVD chamber."

Could this be what I'm looking for. A vacuum pressure of 25 to 150 Pa
is no big deal. And the doping sounds easy enough by adding the dopant
gas. So lets say a small wafer (electrical insulator) is place in the
LPCVD. This results in a doped Polycrystalline silicon coating on the
entire wafer. Next, could I use a molecular or ion beam to remove the
unwanted doped Polycrystalline silicon or an etching technique? And
then, use evaporator deposition to add the metal and ohmic contacts?


Thanks,
Anon
 
Probably not.  Silane is not nice stuff (the other compounds used in
CVD systems are not very friendly either from what I remember).  At
the very least read the MSDS

http://encyclopedia.airliquide.com/Encyclopedia.asp?GasID=57

A lab I worked in used it in one of their experiments and the warnings
about leaks were explicit and repeated.

Robert


Hello,

Do you know of any alternative methods to coat doped Polycrystalline
silicon on an insulator?

Thanks,
Anon
 
K

krw

Jan 1, 1970
0
[email protected]>, sub2
@aeolusdevelopment.com says...>
Probably not. Silane is not nice stuff (the other compounds used in
CVD systems are not very friendly either from what I remember). At
the very least read the MSDS

http://encyclopedia.airliquide.com/Encyclopedia.asp?GasID=57

A lab I worked in used it in one of their experiments and the warnings
about leaks were explicit and repeated.

Yes, Silane is dangerous stuff. The stuff is stored in bunkers
because it is *explosive*. I believe it smells like garlic. The
cafeteria in one of our fabs banned garlic because people were
trained to evacuate the area at the first whif of garlic. You
*really* don't want to mess with that stuff.
 
Even a point-contact transistor will have
better performance than an amorphous-Si thin film device.


Phil or anyone,

a-Si has a band gap of 1.7eV. c-Si has a band gap of 1.1eV. I'm
wondering if adding more dopants to the a-Si to lower the barrier
height could make it as almost good as c-Si. c-Si has a transit-time
of about 10ps. Does anyone know the transit-time for a-Si? I don't see
why it would be much different.

Thanks,
Anon
 
M

Martin Griffith

Jan 1, 1970
0
On Thu, 13 Nov 2008 14:11:27 -0800 (PST), in sci.electronics.design
I would like to purchase low quantities of high purity semiconductors,
such as Si and GaAs. I'll have the material doped, for dopant
densities ranging from as low as 5e-18 to 5e-15 /cm^3.

Thanks for any links and references,
Anon
this could be fun

martin
 
there was a kit on the market for a diffusion doped solar cell done on
a hot plate in air.

Look, most junctions in the beginning were done with oven diffusion
in a quartz tube under vacuum, with a induction heater heating the
silicon rod. If you first melt a segment of the rod and move the
molten zone, the impurities will move with the melt. You can then move
impurities into the rod the same way you diffused them out.
The trick is picking where to slice the rod on either side of the
junction. Buy a doped wafer and apply what you need to the surface,
and then cook it on that side. Vacuum metalizing is easy if you
sputter, as is chemically applied silver (Brashear process). Bonding
would be done with indium onto the metalized pads.

do a google for "midwest tungsten" for evaporation supplies.

Steve
 
R

Rich Grise

Jan 1, 1970
0
there was a kit on the market for a diffusion doped solar cell done on a
hot plate in air.

Look, most junctions in the beginning were done with oven diffusion
in a quartz tube under vacuum, with a induction heater heating the silicon
rod. If you first melt a segment of the rod and move the molten zone, the
impurities will move with the melt. You can then move impurities into the
rod the same way you diffused them out. The trick is picking where to
slice the rod on either side of the junction. Buy a doped wafer and apply
what you need to the surface, and then cook it on that side. Vacuum
metalizing is easy if you sputter, as is chemically applied silver
(Brashear process). Bonding would be done with indium onto the metalized
pads.

do a google for "midwest tungsten" for evaporation supplies.

I used to work for a place where one of their products was a molecular
beam epitaxy machine. I think it went for about $300,000-$400,000. =:-O

Cheers!
Rich
 
google the following

"N+ silicon solar cells emitters realized using phosphoric acid as
doping source in a spray process "

Steve
 
I would like to purchase low quantities of high purity semiconductors,
such as Si and GaAs. I'll have the material doped, for dopant
densities ranging from as low as 5e-18 to 5e-15 /cm^3.

Thanks for any links and references,
Anon

Oooohh, and visit your local university's EE library! Tons of old
reference works and thesises (theses?) to peruse!
On all subjects!
 
I'm struggling to understand this. Two questions that are stumping me:



4. It would be much easier to do the processing on
the silicon, e.g. by high temperature diffusion.


Buy a doped wafer and apply what you need to the surface,
and then cook it on that side. Vacuum metalizing is easy if you
sputter, as is chemically applied silver (Brashear process).


Several people have recommended buying a wafer. It was my impression
that at the microscopic scale even undoped silicon has relatively low
resistance. Perhaps I'm wrong. Anyhow, lets use the simplest
semiconductor, a diode. Could someone _please_ tell me how a schottky
diode is made on a doped wafer? It appears the recommended method is
to somehow etch a long thin _hole_ into the wafer and then deposit
metal into the hole to make the metal contact-- imagine shoving a thin
metal plate sideways into the doped wafer. Then etch two similar holes
on the outside of that and deposit the ohmic contact material, thus
forming a schottky diode. Perhaps etching is easier than I thought.
Anyhow, that's one simple diode, but how would multiple components
work on the same doped wafer then the doped wafer itself has low
resistance-- It would short out the entire circuit. I'm guessing that
doped wafer would not work, which leads to buying an undoped wafer and
using evaporator deposition (by heating the material in a vacuum) to
make the doped areas. Both of these methods are different since it
makes the junction plates vertical. My initial plan was to make the
junction plates horizontal. Etching such thin vertical hole sounds far
more difficult than simply depositing the plate materials on top of
the surface. Any thoughts and recommendations would help a lot.



My second question is, if a polysilicon undoped wafer is purchased,
and a small area (say 3um x 3um) is coated with ohmic contact
material, followed by a similar metal contact coating, and followed by
a similar silicon coating, all by means of evaporator deposition (by
heating the material in a vacuum), then would the deposited silicon be
polysilicon or amorphous? The goal is poly or mono crystalline
silicon, or better yet GaAs. The thought is that since the wafer is
polysilicon, then the metal atoms would convey the crystal structure
to the deposited silicon. Perhaps it would help if the evaporator
deposition process is slowed down, or perhaps chilling or heating the
wafer. Perhaps it would help if the coating depths are thin, on the
order of a few dozen nanometers.



Thanks,
Anon
 
I'm struggling to understand this. Two questions that are stumping me:



Several people have recommended buying a wafer.  It was my impression
that at the microscopic scale even undoped silicon has relatively low
resistance. Perhaps I'm wrong. Anyhow, lets use the simplest
semiconductor, a diode. Could someone _please_ tell me how a schottky
diode is made on a doped wafer?  It appears the recommended method is
to somehow etch a long thin _hole_ into the wafer and then deposit
metal into the hole to make the metal contact-- imagine shoving a thin
metal plate sideways into the doped wafer. Then etch two similar holes
on the outside of that and deposit the ohmic contact material, thus
forming a schottky diode. Perhaps etching is easier than I thought.
Anyhow, that's one simple diode, but how would multiple components
work on the same doped wafer then the doped wafer itself has low
resistance-- It would short out the entire circuit. I'm guessing that
doped wafer would not work, which leads to buying an undoped wafer and
using evaporator deposition (by heating the material in a vacuum) to
make the doped areas. Both of these methods are different since it
makes the junction plates vertical. My initial plan was to make the
junction plates horizontal. Etching such thin vertical hole sounds far
more difficult than simply depositing the plate materials on top of
the surface. Any thoughts and recommendations would help a lot.

My second question is, if a polysilicon undoped wafer is purchased,
and a small area (say 3um x 3um) is coated with ohmic contact
material, followed by a similar metal contact coating, and followed by
a similar silicon coating, all by means of evaporator deposition (by
heating the material in a vacuum), then would the deposited silicon be
polysilicon or amorphous?  The goal is poly or mono crystalline
silicon, or better yet GaAs. The thought is that since the wafer is
polysilicon, then the metal atoms would convey the crystal structure
to the deposited silicon. Perhaps it would help if the evaporator
deposition process is slowed down, or perhaps chilling or heating the
wafer. Perhaps it would help if the coating depths are thin, on the
order of a few dozen nanometers.

Thanks,
Anon

I don't think a raw wafer will have oxide on it, unless you count what
would occur naturally (very very slow). I think the Schokty diode is a
good idea. If you could get a wafer with epi, then sputter Al on it
(as I mentioned in my earlier post), you would get an ohmic contact on
one side and a Al-Si juction on the other side. Someone you need to
insure the sputtered Al doesn't short the two sides together. I guess
a HF etch would be a good idea since there could be a microscopic
amount of oxide.
 
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