Where to buy high purity semiconductors?

[[email protected]]

On Nov 15, 6:55 am, [email protected] wrote: [snip]

Several people have recommended buying a wafer. It was my impression
that at the microscopic scale even undoped silicon has relatively low
resistance. Perhaps I'm wrong. Anyhow, lets use the simplest
semiconductor, a diode. Could someone _please_ tell me how a schottky
diode is made on a doped wafer? It appears the recommended method is
to somehow etch a long thin _hole_ into the wafer and then deposit
metal into the hole to make the metal contact-- imagine shoving a thin
metal plate sideways into the doped wafer. Then etch two similar holes
on the outside of that and deposit the ohmic contact material, thus
forming a schottky diode. Perhaps etching is easier than I thought.
Anyhow, that's one simple diode, but how would multiple components
work on the same doped wafer then the doped wafer itself has low
resistance-- It would short out the entire circuit. I'm guessing that
doped wafer would not work, which leads to buying an undoped wafer and
using evaporator deposition (by heating the material in a vacuum) to
make the doped areas. Both of these methods are different since it
makes the junction plates vertical. My initial plan was to make the
junction plates horizontal. Etching such thin vertical hole sounds far
more difficult than simply depositing the plate materials on top of
the surface. Any thoughts and recommendations would help a lot.

My second question is, if a polysilicon undoped wafer is purchased,
and a small area (say 3um x 3um) is coated with ohmic contact
material, followed by a similar metal contact coating, and followed by
a similar silicon coating, all by means of evaporator deposition (by
heating the material in a vacuum), then would the deposited silicon be
polysilicon or amorphous? The goal is poly or mono crystalline
silicon, or better yet GaAs. The thought is that since the wafer is
polysilicon, then the metal atoms would convey the crystal structure
to the deposited silicon. Perhaps it would help if the evaporator
deposition process is slowed down, or perhaps chilling or heating the
wafer. Perhaps it would help if the coating depths are thin, on the
order of a few dozen nanometers.

[snip]
I think the Schokty diode is a
good idea. If you could get a wafer with epi, then sputter Al on it
(as I mentioned in my earlier post), you would get an ohmic contact on
one side and a Al-Si juction on the other side.

I'm sorry. I'm not following most of that. Perhaps we could use the
following image as a reference,

http://www.infras.com/Tutorial/sld013.htm

The dark gray is the epiwafer. Don't I need to make small doped areas,
the green area?


Could I ask what happens if I sputter metal on top of a epiwafer, and
then sputter silicon on top of that metal? What I'm getting at, is
the sputtered silicon that is on top of the metal is it amorphous or
polysilicon?


Thanks for the help,
Anon

 

[[email protected]]

On Nov 15, 6:55 am, [email protected] wrote: [snip]

Several people have recommended buying a wafer.  It was my impression
that at the microscopic scale even undoped silicon has relatively low
resistance. Perhaps I'm wrong. Anyhow, lets use the simplest
semiconductor, a diode. Could someone _please_ tell me how a schottky
diode is made on a doped wafer?  It appears the recommended method is
to somehow etch a long thin _hole_ into the wafer and then deposit
metal into the hole to make the metal contact-- imagine shoving a thin
metal plate sideways into the doped wafer. Then etch two similar holes
on the outside of that and deposit the ohmic contact material, thus
forming a schottky diode. Perhaps etching is easier than I thought.
Anyhow, that's one simple diode, but how would multiple components
work on the same doped wafer then the doped wafer itself has low
resistance-- It would short out the entire circuit. I'm guessing that
doped wafer would not work, which leads to buying an undoped wafer and
using evaporator deposition (by heating the material in a vacuum) to
make the doped areas. Both of these methods are different since it
makes the junction plates vertical. My initial plan was to make the
junction plates horizontal. Etching such thin vertical hole sounds far
more difficult than simply depositing the plate materials on top of
the surface. Any thoughts and recommendations would help a lot.
My second question is, if a polysilicon undoped wafer is purchased,
and a small area (say 3um x 3um) is coated with ohmic contact
material, followed by a similar metal contact coating, and followed by
a similar silicon coating, all by means of evaporator deposition (by
heating the material in a vacuum), then would the deposited silicon be
polysilicon or amorphous?  The goal is poly or mono crystalline
silicon, or better yet GaAs. The thought is that since the wafer is
polysilicon, then the metal atoms would convey the crystal structure
to the deposited silicon. Perhaps it would help if the evaporator
deposition process is slowed down, or perhaps chilling or heating the
wafer. Perhaps it would help if the coating depths are thin, on the
order of a few dozen nanometers.
Thanks,
Anon

[snip]
I think the Schokty diode is a
good idea. If you could get a wafer with epi, then sputter Al on it
(as I mentioned in my earlier post), you would get an ohmic contact on
one side and a Al-Si juction on the other side.

I'm sorry. I'm not following most of that. Perhaps we could use the
following image as a reference,

http://www.infras.com/Tutorial/sld013.htm

The dark gray is the epiwafer. Don't I need to make small doped areas,
the green area?

Could I ask what happens if I sputter metal on top of a epiwafer, and
then sputter silicon on top of that metal?  What I'm getting at, is
the sputtered silicon that is on top of the metal is it amorphous or
polysilicon?

Thanks for the help,
Anon

I couldn't follow that website. Look at these::
http://www.freepatentsonline.com/6781161-0-large.jpg
http://parts.jpl.nasa.gov/asic/gif.images/figure.3.4.9.gif
I don't recall the semiconductor flavor (P or N) for a Schokty, but
basically you want a heavily doped layer on one side and a lightly
doped layer on the other. The metalization on the heavily doped layer
will be an ohmic contact. The metalization on the lightly doped layer
with be the diode junction.

I'm not really up on my semiconductor physics. Er, not my job. ;-)

 

[[email protected]]

OK, I drew a picture of what I'm talking about of making a simple
schottky diode. See this page

http://sites.google.com/site/curiousjohn4/


I would start with an undoped polysilicon silicon wafer. Then sputter
ohmic contact. Then sputter metal contact. Then sputter silicon. Then
sputter the top layer ohmic contact. The two pins (anode and cathode)
are at the edges to be used for the rest of the circuit on the chip.

Could someone please set me straight on if this is the way to go or
not?

Thanks,
Anon

 

[[email protected]]

OK, I drew a picture of what I'm talking about of making a simple
schottky diode. See this page

http://sites.google.com/site/curiousjohn4/

I would start with an undoped polysilicon silicon wafer. Then sputter
ohmic contact. Then sputter metal contact. Then sputter silicon. Then
sputter the top layer ohmic contact. The two pins (anode and cathode)
are at the edges to be used for the rest of the circuit on the chip.

Could someone please set me straight on if this is the way to go or
not?

Thanks,
Anon

I'm lost on what you consider an ohmic contact. Basically the only way
you contact silicon is via metal on silicon of sufficient doping to
get an ohmic contact.

I never made any semi with poly, though there are solar cells using
poly. Generally poly is just used for gates and capacitors.

I think what you really want to get is a wafer that is heavily doped
on one side and lightly doped on the other. I believe this is possible
with an epi wafer. Ah, here is someone's patent that looks right:
http://www.freepatentsonline.com/6998694-0-large.jpg
I think CCDs would be built on such a wafer.

 

[JosephKK]

That's a wealth of appreciated info. Lots to think about. I was a bit
surprised to read of amorphous-Si poor performance. Perhaps the best
Si performance would be mono-crystalline. What would be the simplest
garage project design to make high performance semiconductors, not
amorphous-Si? A personal goal is high performance schottky contact
pads on the order of a few micrometers in diameter, perhaps better
over time.

OK, my design was flawed, amorphous-Si is not good. I'm confused now.
How about the following design of fabricating high performance
semiconductor chips. Take an electrically insulated wafer (SiO2?),
apply photoresist, use UV light to lift the desired photoresist, coat
with doped silicon, then lift the remaining photoresist. Does that
sound like a viable method? The only thing I don't care about that
design is I have no idea how to make or where to buy doped silicon.

Thanks for any help. I need it!
Anon

I was going to suggest that you use search engines to find the stuff,
but after another moments reflection i realized that you would be
lucky to find decent books on primitive and historical semiconductor
processing. Home building anything like a modern line is way out of
the question for less that many 10s of millions.

Building alterative methods of early processes is doable, but still
expensive. Photo-resist processes are almost always necessary.
Diffusion, ion implantation, alloying, annealing; all requiring high
temperatures, and vacuum or reactive highly toxic gasses and exotic
expensive materials.

Look up information and books on diffusion ovens and step and repeat
automatic mask aligners for starters.

Go for it though, even your self challenge is seriously daunting to
me. With over 10 years of puttering and decent funds even i might be
able to do it. Besides, you are bound to make all kinds of exotic
specialty devices along the way.

 

[JosephKK]

What I don't understand is what good are those 6" diameter pure Si
wafers. They are solid pure silicon. If you deposit on that then the
entire chip is on pure silicon. Wouldn't all of that silicon short out
everything? I don't get it yet.

Thanks,
Anon

There are various methods of doing selective deposition, typically
using photo resist masking. Also there is selective material removal,
also using photo resist masking. Used in combinations with other
processes these can produce usefully complex arrangements of
arrangements of materials desired. Simple transistors usually have
about 5 or 6 photo masks involved.

 

[JosephKK]

Hello,

Do you know of any alternative methods to coat doped Polycrystalline
silicon on an insulator?

Thanks,
Anon

You do not have to use polycrystalline Si and you do not have to use
LPCVD. Normal epitaxial systems work just fine and can deposit doped
layers. Diffusion works just fine. Your base wafer is pretty much
monocrystalline to begin with.

 

[JosephKK]

[email protected]>, sub2
@aeolusdevelopment.com says...>

Yes, Silane is dangerous stuff. The stuff is stored in bunkers
because it is *explosive*. I believe it smells like garlic. The
cafeteria in one of our fabs banned garlic because people were
trained to evacuate the area at the first whif of garlic. You
*really* don't want to mess with that stuff.

I remember those properties being associated with arsine, which is
hypergolic with normal room air as well. As well as having many toxic
byproducts.

 

[[email protected]]

You do not have to use polycrystalline Si and you do not have to use
LPCVD.  Normal epitaxial systems work just fine and can deposit doped
layers.  Diffusion works just fine.  Your base wafer is pretty much
monocrystalline to begin with.- Hide quoted text -

Thanks for the help! I merely thought the photoresist method was more
difficult. You have to coat and spin, etct, deposit, etc.

I thought perhaps the following method was better suited for a garage
project. Take a wafer (high electrical resistance), coat the ohmic
metal contact, then coat the metal contact, then coat the doped
semiconductor contact, then coat the ohmic metal contact, thus forming
a schottky diode. The coating could be done by sputter or evaporation.
I was told that the deposited doped semiconductor would be amorphous.
The chip would then be annealed by rapid thermal annealing to convert
the semiconductor from amorphous to polysilicon since amorphous is a
lot slower in electrical response than polysilicon.

I don't know, I thought the later method would be easier to build. I
wouldn't even know where to buy photoresist, much less apply the thin
even coat, and the etching chemicals.

Thanks,
Anon

 

[[email protected]]

Thanks for the help!  I merely thought the photoresist method was more
difficult. You have to coat and spin, etct, deposit, etc.

I thought perhaps the following method was better suited for a garage
project. Take a wafer (high electrical resistance), coat the ohmic
metal contact, then coat the metal contact, then coat the doped
semiconductor contact, then coat the ohmic metal contact, thus forming
a schottky diode. The coating could be done by sputter or evaporation.
I was told that the deposited doped semiconductor would be amorphous.
The chip would then be annealed by rapid thermal annealing to convert
the semiconductor from amorphous to polysilicon since amorphous is a
lot slower in electrical response than polysilicon.

I don't know, I thought the later method would be easier to build. I
wouldn't even know where to buy photoresist, much less apply the thin
even coat, and the etching chemicals.

Thanks,
Anon

Sorry, I forgot to add the link so you can see the drawing

http://sites.google.com/site/curiousjohn4/

Anon

 

[JosephKK]

Sorry, I forgot to add the link so you can see the drawing

http://sites.google.com/site/curiousjohn4/

Anon

You can find photo resist vendors with any search engine. Select for
ones that you can expose effectively (not requiring very short
wavelength UV).

How do you intend to control the deposition location of your layers?

Electron guns are fairly easy to build. There are resists that can
use that as well. building an ion beam is rather tricky, but i think
possible for the determined hobbyist.

 

[JosephKK]

I'm lost on what you consider an ohmic contact. Basically the only way
you contact silicon is via metal on silicon of sufficient doping to
get an ohmic contact.

I never made any semi with poly, though there are solar cells using
poly. Generally poly is just used for gates and capacitors.

I think what you really want to get is a wafer that is heavily doped
on one side and lightly doped on the other. I believe this is possible
with an epi wafer. Ah, here is someone's patent that looks right:
http://www.freepatentsonline.com/6998694-0-large.jpg
I think CCDs would be built on such a wafer.

Most modern ICs are built on such wafers, with the moderately highly
doped side (the shiny side) being an epitaxial layer.