Well, if we generously assume that an ADC that fast could have a 5V
input range, 1 LSB at 20 bits is 5 uV, and the quantization noise is
1/sqrt(12) times that, or 1.4 uV. In a 100 MHz bandwidth, that's
140 pV/sqrt(Hz). In real life, the input structure would have to be
several times faster than that in order to settle to that accuracy
in the time available, putting the maximum input noise down in the
50 pV/sqrt(Hz) range, not counting the effects of input capacitance.
Good luck with that.
Cheers
Phil Hobbs
Irritated yelling mode...You have just demonstrated once again WHY I
re-derive EVERYTHING! I NEVER trust 'cookbook' equations, especially
after getting severely burnt by an article in EDN showing 'cookbook'
values for a simple 'what's its name? filter [the simple 5-pole low
pass type using two 2N3904's in series]. Whereupon, I was forced to
rederive ALL the values for both Butterworth AND Tschebyshev(sp?)
*and* using an HP calculator with reverse polish input (spit, spit,
curse begone!) I 'optimized' a response to obtain values and voila!
worked. But that little effort caught me on a late Friday [deadline
Monday morning] to make a filter that worked! All weekend!
I HATE PACKAGED FORMULAS!!! I have NO idea what these numbers you gave
me should mean to me.
Now back to quiet mode...Thank you for providing 'numbers', although I
have NO idea what they mean, nor how they relate to what I'm doing. I
just checked and found that *if* I use 16 bit 10MHz ADC's in my
system, the system will be next to useless. *IF* I can get 22 bits, it
will work almost as well as the previous system. Probably live with 20
bits, but the performance is going to suffer.
Digitization noise dominates in my system, NOT the noise density
function. Front end can be lousy at 2nV/rtHz, prefer 1nV/rtHz [50 ohm
system], BW is cutoff at 20MHz, digitize -1V to +1V to 20 bits at
10MS/s the system will just barely make it. If could digitize to 22
bits, the system will work acceptibly!
So back to...
Who makes a 20+ bit ADC with 10MS/s capability?