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Where to get high speed ADC's and DACs

P

Phil Hobbs

Jan 1, 1970
0
Well, if we generously assume that an ADC that fast could have a 5V
input range, 1 LSB at 20 bits is 5 uV, and the quantization noise is
1/sqrt(12) times that, or 1.4 uV. In a 100 MHz bandwidth, that's
140 pV/sqrt(Hz). In real life, the input structure would have to be
several times faster than that in order to settle to that accuracy in
the time available, putting the maximum input noise down in the
50 pV/sqrt(Hz) range, not counting the effects of input capacitance.

Good luck with that.

Cheers

Phil Hobbs

Irritated yelling mode...You have just demonstrated once again WHY I
re-derive EVERYTHING! I NEVER trust 'cookbook' equations, especially
after getting severely burnt by an article in EDN showing 'cookbook'
values for a simple 'what's its name? filter [the simple 5-pole low pass
type using two 2N3904's in series]. Whereupon, I was forced to rederive
ALL the values for both Butterworth AND Tschebyshev(sp?) *and* using an
HP calculator with reverse polish input (spit, spit, curse begone!) I
'optimized' a response to obtain values and voila! worked. But that
little effort caught me on a late Friday [deadline Monday morning] to
make a filter that worked! All weekend!

I HATE PACKAGED FORMULAS!!! I have NO idea what these numbers you gave
me should mean to me.

(Context restored)
Sorry? LOL! I actually read that out loud for effect.

So apart from posturing, what do you actually disagree with, and why?

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510 USA
+1 845 480 2058

hobbs at electrooptical dot net
http://electrooptical.net
 
R

RobertMacy

Jan 1, 1970
0
So apart from posturing, what do you actually disagree with, and why?

Cheers

Phil Hobbs

Don't take umbrage. I don't think I disagree. I'm sure everything you said
was correct, and as you said, they are rules of thumb for engineering.
It's just that nothing there was useful for me. Well, at first glance
seemed like almost nothing. I couldn't see how to apply all you said to
what I'm doing.

In retrospect, not nothing, because you made me THINK. Your comment, 'good
luck with that' challenged my thinking. Perhaps, I was wrong in what I was
doing. So I went back to my basic system and had to recreate all my
equations from ground zero back up to try operating at 10-100MS/s rates.
Why ground zero? I don't even trust my own equations. I question
EVERYTHING. So four hours of intensive effort later, I verified a lot and
feel better, thanks. Plus, you triggered a topological approach using
'available' parts that had NEVER occurred to me until just now. And, all
those recreated equations allowed me to verify [not rigorously, but at
least a bit empirically] that the approach would be possible. Even better,
for my requirements, I might even be able to get more than 24 bits at
100MS/s.

Gone brain dead here, have I sent any images of results using the present
system to you? If not, send me an email address, and I'll send a couple.
 
R

RobertMacy

Jan 1, 1970
0
How are you measuring that 22.5 bits?

As with most of the measurements, made them, continually have their values
verified indirectly while using the system, so don't revisit.
 
P

Phil Hobbs

Jan 1, 1970
0
...snip...
...snip...

Well, if we generously assume that an ADC that fast could have a 5V
input range, 1 LSB at 20 bits is 5 uV, and the quantization noise is
1/sqrt(12) times that, or 1.4 uV. In a 100 MHz bandwidth, that's
140 pV/sqrt(Hz). In real life, the input structure would have to be
several times faster than that in order to settle to that accuracy in
the time available, putting the maximum input noise down in the
50 pV/sqrt(Hz) range, not counting the effects of input capacitance.

Good luck with that.

Cheers

Phil Hobbs

Irritated yelling mode...You have just demonstrated once again WHY I
re-derive EVERYTHING! I NEVER trust 'cookbook' equations, especially
after getting severely burnt by an article in EDN showing 'cookbook'
values for a simple 'what's its name? filter [the simple 5-pole low pass
type using two 2N3904's in series]. Whereupon, I was forced to rederive
ALL the values for both Butterworth AND Tschebyshev(sp?) *and* using an
HP calculator with reverse polish input (spit, spit, curse begone!) I
'optimized' a response to obtain values and voila! worked. But that
little effort caught me on a late Friday [deadline Monday morning] to
make a filter that worked! All weekend!

I HATE PACKAGED FORMULAS!!! I have NO idea what these numbers you gave
me should mean to me.

(Context restored)
Sorry? LOL! I actually read that out loud for effect.

(Context restored again)
So apart from posturing, what do you actually disagree with, and why?

Cheers

Phil Hobbs

Don't take umbrage. I don't think I disagree. I'm sure everything you
said was correct, and as you said, they are rules of thumb for
engineering. It's just that nothing there was useful for me. Well, at
first glance seemed like almost nothing. I couldn't see how to apply all
you said to what I'm doing.

In retrospect, not nothing, because you made me THINK. Your comment,
'good luck with that' challenged my thinking. Perhaps, I was wrong in
what I was doing. So I went back to my basic system and had to recreate
all my equations from ground zero back up to try operating at 10-100MS/s
rates. Why ground zero? I don't even trust my own equations. I question
EVERYTHING. So four hours of intensive effort later, I verified a lot
and feel better, thanks. Plus, you triggered a topological approach
using 'available' parts that had NEVER occurred to me until just now.
And, all those recreated equations allowed me to verify [not rigorously,
but at least a bit empirically] that the approach would be possible.
Even better, for my requirements, I might even be able to get more than
24 bits at 100MS/s.

Gone brain dead here, have I sent any images of results using the
present system to you? If not, send me an email address, and I'll send a
couple.
The address in my sig works. You haven't given any details, but very
simple and compelling arguments of the above sort tell me that you
aren't getting anywhere near 22 bits at 100 MHz, unless you're using all
low-TC SQUID-based circuitry.

If I'm wrong about that, and you really have found a way to do it for
real, you're going to be extremely famous in very short order.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510 USA
+1 845 480 2058

hobbs at electrooptical dot net
http://electrooptical.net
 
...snip...

Well, if we generously assume that an ADC that fast could have a 5V
input range, 1 LSB at 20 bits is 5 uV, and the quantization noise is
1/sqrt(12) times that, or 1.4 uV. In a 100 MHz bandwidth, that's
140 pV/sqrt(Hz). In real life, the input structure would have to be
several times faster than that in order to settle to that accuracy in
the time available, putting the maximum input noise down in the
50 pV/sqrt(Hz) range, not counting the effects of input capacitance.

Good luck with that.

Cheers

Phil Hobbs

Irritated yelling mode...You have just demonstrated once again WHY I
re-derive EVERYTHING! I NEVER trust 'cookbook' equations, especially
after getting severely burnt by an article in EDN showing 'cookbook'
values for a simple 'what's its name? filter [the simple 5-pole low pass
type using two 2N3904's in series]. Whereupon, I was forced to rederive
ALL the values for both Butterworth AND Tschebyshev(sp?) *and* using an
HP calculator with reverse polish input (spit, spit, curse begone!) I
'optimized' a response to obtain values and voila! worked. But that
little effort caught me on a late Friday [deadline Monday morning] to
make a filter that worked! All weekend!

I HATE PACKAGED FORMULAS!!! I have NO idea what these numbers you gave
me should mean to me.

Sorry? Surely anybody designing high performance A/D subsystems knows
that 2**10 ~= 1000, that the RMS quantization noise of an ideal
digitizer is 1/sqrt(12) of the LSB, and that the noise is more or less
white? You can derive it yourself in about three lines.

All I'm saying is:

1. 1 LSB = FSR/2**N

2. 2**20 ~= 10**6.

Therefore, 1 LSB ~= 5 uV.

3. RMS quantization noise is 1/sqrt(12)* 1 LSB ~= 5 uV/3.46 ~= 1.4 uV,
spread out evenly over the Nyquist interval.

If you have 1 LSB hum at 50/60 Hz it will definitely not spread nicely
around the Nyquist interval. Adding dithering noise artificially or
natural thermal noise about 1 LSB, then the quantization noise will
spread out.
4. The Nyquist bandwidth is 50 MHz (not 100), so given that the noise is
white, the quantization noise PSD is 1.4 uV/sqrt(50 MHz) ~=200 pV/sqrt(Hz).

5. To get that many bits to stay reasonably still, your RMS input noise
has to be well below that. Even slow delta-sigmas are hard pressed to
reach a genuine 20 bits, and most of them actually crap out around 18 or
19, AFAICT.

The thermal noise voltage from a 50 ohm resistor at room temperature
at 50 MHz BW would be 6 uV. If the ADC range is only +/-1V, that would
be about 19 clean bits.
6. IOW, good luck.

That's just engineering rules of thumb.

The OP claimed 22.5 bits with current system, I might even believe
him, if we are talking about measuring a steady state DC signal. The
thermal noise will dither the quantization noise and after heavy low
pass filtering (BW << 50 MHz) you should get quite decent figures.

In an ordinary CD system with 16 bit coding (nominally 96 dB SNR) and
44.1 k sampling rate feeding a low frequency about 1 kHz sine wave to
a variable attenuator and then recording it, while constantly reducing
the amplitude. In this "Fade to Noise" test, the tone is still
detectable at -110 dB to -120 dB levels thanks to the dither. Of
course one could view this as an oversampling example.
 
J

John Devereux

Jan 1, 1970
0
RobertMacy said:
So apart from posturing, what do you actually disagree with, and why?

Cheers

Phil Hobbs

Don't take umbrage. I don't think I disagree. I'm sure everything you
said was correct, and as you said, they are rules of thumb for
engineering. It's just that nothing there was useful for me. Well, at
first glance seemed like almost nothing. I couldn't see how to apply
all you said to what I'm doing.

In retrospect, not nothing, because you made me THINK. Your comment,
good luck with that' challenged my thinking. Perhaps, I was wrong in
what I was doing. So I went back to my basic system and had to
recreate all my equations from ground zero back up to try operating at
10-100MS/s rates. Why ground zero? I don't even trust my own
equations. I question EVERYTHING. So four hours of intensive effort
later, I verified a lot and feel better, thanks. Plus, you triggered a
topological approach using 'available' parts that had NEVER occurred
to me until just now. And, all those recreated equations allowed me to
verify [not rigorously, but at least a bit empirically] that the
approach would be possible. Even better, for my requirements, I might
even be able to get more than 24 bits at 100MS/s.

Gone brain dead here, have I sent any images of results using the
present system to you? If not, send me an email address, and I'll send
a couple.

I would like to see them too. Do they differ from a system where the
lower few bits are generated by random noise? A sigma-delta ADC might
have a 40MHz clock, so internally there is a 40MHz 1-bit ADC, that with
sufficient processing turns into a 24-bit result. But that does not make
a 40MHz 24-bit ADC either.
 
R

RobertMacy

Jan 1, 1970
0
Hey, I'd like to see some too, and I am sure more people here would.
Website?
If you cannot find a site I can put them on my server in /pub/

Thank you for your kind offer. For me, I've NEVER gotten Dropbox to work
nor most of those 'public post your picture' sites. Can't even pick up
pictures from Dropbox half the time.
 
R

RobertMacy

Jan 1, 1970
0
I would like to see them too. Do they differ from a system where the
lower few bits are generated by random noise? A sigma-delta ADC might
have a 40MHz clock, so internally there is a 40MHz 1-bit ADC, that with
sufficient processing turns into a 24-bit result. But that does not make
a 40MHz 24-bit ADC either.


will do.

don't know.
 
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