Andes Technology Corporation, a global leader in RISC-V CPU solutions, recently announced its new AndesCore 45-series CPU.
The company’s new CPU is equipped with an efficient superscalar pipeline that addresses a wide range of high-performance, power-sensitive, and real-time embedded systems. These include 5G, expected to launch in 2020, alongside in-vehicle infotainment, advanced driver assistance systems (ADAS), and solid-state disks (SSDs).
It is expected that the new 45-series CPU will become available to the first batch of customers in Q1 2020.
Andes Technology commercial building in Taiwan. Image Credit: Andes Technology.
8-Stage Pipeline Performance for RISC-V
At the top of the line of 45-series CPUs, the AX45 core can operate at a clock frequency of up to 1.2GHz at 28nm. Initially available in the 45-series will be the 32-bit (A45/D45/N45) and 64-bit (AX45/DX45/NX45) CPUs.
The A45 and AX45 support Linux and can be scaled up to four cores while the D45 and DX45 support RISC-V packed SIMD/DSP instructions, and the N45 and NX45 support RTOS. All 45-series cores use an 8-stage, dual-issue superscalar pipeline that incorporates error correction, feature IEEE754-compliance, and single or double precision FPU.
In the 45-series, branch prediction improves performance with minimal power consumption and a Memory Management Unit (MMU) with configurable table sizes allows the A45 and AX45 to run Linux operating systems that are fully supported by RISC-V.
Existing Andes features that are supported include:
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PowerBrake
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QuickNap
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WFI for power saving
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StackSafe for stack under/overflow protection
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CoDense for code density enhancement
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Andes Custom Extension for user-defined instructions
Processors used in the 45-series are being tuned for real-time embedded applications. As we mentioned above, these include 5G, IVI, ADAS, and SSDs. The 45-series will be released alongside an ecosystem partner with solutions already enabled for security, hardware debug, and system-level modeling.