January 14, 2020 by Luke James
SiFive and CEVA announce a new collaboration for the design and development of ultra-low-power domain-specific Edge AI processors,
SiFive and CEVA recently announced a new collaboration for the design and development of ultra-low-power Edge AI processors that are domain-specific tor different high-volume end markets.
SiFive, Inc. is a premier provider of commercial silicon and RISC-V processor IP solutions. On the other hand, CEVA, Inc. is a leading licensor of smart sensing technologies and wireless connectivity. The collaboration falls under the SiFive’s DesignShare Program and centers around AI processors and software, CEVA’s DSP cores, and SiFive’s RISC-V CPUs.
The DesignShare Program enables joint silicon development for the creation of Edge AI system-on-chips (SoCs) that combines the design and IP strengths of the two companies for high-volume end markets that include automotive, smart home, security, robotics, industrial, augmented reality, and IoT
The end product is designed applications such as sensor fusion and speech recognition, computer vision, and imaging that require on-device neural networks. Initially, it is for end markets such as automotive, security and surveillance, smart home, robotics, industrial, augmented reality, and IoT.
CEVA’s NeuPro-S AI processor diagram of primary software and hardware components. Image Credit: CEVA.
Domain-specific SoCs may soon become mainstream because of the increased processing of workloads of devices that include a mix of efficient deep neural networks and traditional software to maximize battery life and performance, as well as to add new intelligent features.
Cloud-based AI Inference isn’t fit for use by multiple different devices because of privacy, security, and latency concerns. CEVA and SiFive are tackling these challenges by developing a wide range of Edge AI processor designs that are scalable and domain-specific. Moreover, these tools have an optimal balance of cost, power efficiency, and processing.
CEVA’s CDNN Deep Neural Network machine learning software compiler supports the Edge AI SoCs by creating optimized runtime software for Neupro AI processors, CEVA-BX audio DSPs, and CEVA-XM vision processors. These embedded devices are for the mass market with CDNN that includes a wide range of advanced quantization algorithms, network optimizations, and fully optimized compute RNN and CNN libraries. Furthermore, they feature a data flow management for cloud-trained AI models that are deployable for inference processing on edge devices.
CEVA plans to provide a full development platform for developers and partners based on these Neupro and CEVA-XM architectures. The two hope to develop deep learning applications using the DSP tools and libraries, an advanced network, and CDNN for voice pre- and post-processing and audio workloads.
The DesignShare IP program benefits companies that desire a streamlined process because they can collaborate with leading vendors for a pre-integrated premium silicon IP for new SOCs; SiFive will license the IP when it’s ready for mass production. This allows developers to do away with the complexities of licensing agreements and contract negotiation, with the added benefit of being able to market their products quickly without upfront payment, legal red tape, and extra prototyping.
Ultimately, this partnership paves the way for the efficient and expert development of Edge AI SoCs for advanced workloads. Furthermore, it retains the flexibility for fresh innovations in machine learning.
According to CEVA Executive Vice President for worldwide sales, Issachar Ohana, their AI processors and DSPs are market leaders, and together with the CDNN machine learning software compiler, they can simplify the distribution of cloud-trained AI models. They also offer a compelling solution for those that wish to take advantage of AI at the edge.
On the other hand, SiFive President and CEO, Dr. Naveed Sherwani, said that device manufacturers could shorten time-to-market and gain access to the industry immediately by creating differentiated and robust solutions.
