Standalone hardware password manager on PIC16F13145 Cnano uses ring‑oscillator TRNG for entropy, encrypts passwords on‑device, stores ciphertext in external EEPROM, and streams it via UART to a PC script for seamless autofill. No clock‑based or software attack surface, portable and secure. Ideal for crypto wallets, banking logins, and credentials.
1. Introduction
Software‑only password keepers keep getting cracked by phishing, key‑loggers, or a single cloud breach, and even hardware dongles that “look random” can be spoofed when their pseudo‑random generators lean on a predictable clock (the YouTube hack where attackers swept the PC clock to recreate the same code).
So this project builds a fully standalone password box on a PIC16F13145 Cnano: inside the chip’s CLBs a bunch of jittery ring oscillators feed a true random number generator; one button spits out a fresh password, instantly encrypts it, and drops the cipher in off‑chip EEPROM(Mirochip's AT24C256); another button fires that ciphertext over UART, where a tiny Python script on the host types it in—never revealing plaintext anywhere.
Key wins: entropy‑rich TRNG, end‑to‑end on‑device password lifecycle, and a dead‑simple UART interface. All in all, a portable, no‑leak, no‑cloud, clock‑proof answer for crypto, banking, and everyday logins.
2. Methodology
The CLB handles the random number generator made of an array of ring oscillators and the MCU samples the output bit at a set interval (10ms for the tests shown below). This allows the MCU to create a bitstream that is truly random and then this is used to generate password. This password is encrypted and saved to the EEPROM and then recalled and sent via UART to the host machine where it is decoded and enetered on the user's computer using a python script.
Ring Oscillator Array on the CLB
A ring oscillator is a closed loop made from an odd number of inverting stages—think of tiny electronic “mirrors” that always output the opposite of what they receive. When the output of the last inverter is fed back to the first, the circuit can never settle on a single logic level: if the loop is momentarily “high,” the chain of inversions forces it low, and that low level then ripples around to push it high again. Because each inverter introduces a small propagation delay, this chase repeats at a regular pace, turning a constant supply voltage into a self‑sustaining digital square wave whose frequency is set by the combined delays of all the stages.In principle a ring oscillator is perfectly regular; its period is fixed by the delay of the inverters. In practice those delays are never identical from one cycle to the next. They are modulated by tiny, uncontrollable physical influences—thermal agitation of charge carriers in each transistor, flicker noise inside the MOSFET channel, microscopic supply‑voltage ripple, even stray electromagnetic fields in nearby traces. These sources of analog noise shift the moment when each inverter changes state by a few picoseconds, so the exact length of every oscillation cycle jitters around its nominal value in a way that cannot be predicted or reproduced. (A more academically appropriate definition can be found in the IEEE style paper attached below). An array of such inverters was created and XORd together with each stage isolated by D flip flops. Since all gates must get input for successful synthesis RC1 and RB7 were used to feed the gates and left floating in direct input mode to ensure metastability. Over time the gates generate truly random bits. The circuit for the whole TRNG has been attached below. Since MCC does not allow us to sample back an output, RC2 was shorted to RC6 and sampled to generate bitstream. (In the paper attached below, limitation of this design are explained since they are usually made in FPGA with much more LUTs available)
theoretical ring oscillator example
Password generation
When a user presses the oboard button connected to RC3, a random bit is sampled from RC6 by IO_RC6_GetValue() function after a set small interval to increase randomness and decorelate successive sample since each new sample is slightly biased towards the previous sample. These bits are concatenated to form an eight bit character which is then accumulated by the second routine to create an 8 digit password.(These algorithms are described in the paper and the code is attached below).
Password Encryption
Attackers have previously used fake USB ports and sniffing devices, known as hardware keyloggers, to capture sensitive data passed between peripherals and host PCs. This hardware password manager would also be vulnerable if the raw, unencrypted password were transmitted directly to the host. To prevent this, the password is encrypted before transmission. For this task, the XTEA encryption algorithm was chosen. Designed in 1997, XTEA relies on basic operations like addition, XOR, and bit shifts combined with a secret key, making it lightweight and perfect for real-time encryption on a microcontroller. The same key-based operations are used later to decrypt the password. After encryption, the resulting cipher is stored in an external EEPROM so that the password is retained even after a power cycle.(Algorithm has been described in attached paperif code is not clear)
void xtea_encrypt8(const uint8_t pw[8], const uint8_t key[16], uint8_t ct[8]) {
uint32_t k0 = (key[0]) | (key[1]<<8) | (key[2]<<16) | (key[3]<<24);
uint32_t k1 = (key[4]) | (key[5]<<8) | (key[6]<<16) | (key[7]<<24);
uint32_t k2 = (key[8]) | (key[9]<<8) | (key[10]<<16) | (key[11]<<24);
uint32_t k3 = (key[12]) | (key[13]<<8) | (key[14]<<16) | (key[15]<<24);
uint32_t v0 = (pw[0]) | (pw[1]<<8) | (pw[2]<<16) | (pw[3]<<24);
uint32_t v1 = (pw[4]) | (pw[5]<<8) | (pw[6]<<16) | (pw[7]<<24);
uint32_t sum = 0;
for (int i = 0; i < ROUNDS; i++) {
sum += DELTA;
v0 += (((v1<<4) ^ (v1>>5)) + v1) ^ (sum + (k0 + ((sum & 3) * (k1 - k0))));
v1 += (((v0<<4) ^ (v0>>5)) + v0) ^ (sum + (k2 + (((sum>>11) & 3) * (k3 - k2))));
}
for (int i = 0; i < 4; i++) ct[i] = (v0 >> (8*i)) & 0xFF;
for (int i = 0; i < 4; i++) ct[4+i] = (v1 >> (8*i)) & 0xFF;
}
Secure password retrieval and entry
There is another larger button connected to the devboard that is used to type password on the host machine. When RB5 goes low, the cnano sends encrypted password over UART to the host machine where it is decrypted by a python script and typed onto the host machine. The main idea is that the device can only work if the host user has the same XTEA encryption key so even if the device itself is stolen, it cannot be used by attackers to inject passwords since they do not have the XTEA key unless they manage to dump and reconstruct firmware.
3. Results
Since the device is used to access sensitive information, it is very important to ensure proper functionality and to conduct thorough testing. Therefore initially 150 passwords were generated to ensure repeated passwords were not possible even under similiar conditions (thermal and electrical noise). Same procedure was done over a long bitstream.
Further mathematical testing was conducted as well. Hamming distance for generated bytes was measured of 20 consecutive bytes with each other and plotted as a heatmap.(mathematical formulas, mean, and standard deviation have been mentioned in the paper). This experiment was repeated twice
Even if the individual bytes are not as random as required, it can be theorized that their combinations would still be much more random. This was tested by generating 24 passwords and calculating their pairwise hamming distances. Again a heatmap was plotted here (further detail is in the paper).
heatmap for generated passwords
4.Discussion
Gnerally speaking a brighter region in the heatmap here indicates more randomness or larger difference in generated byte or password. The diagonals are always zero since that is self-comparison. During testing certain hyperparameters were identified that had an effect on randomness (described in the paper) but were not tuned and chosen randomly due to lack of time.
Despite this, In the case of Individual bytes, it was observed that the bytes differed from each other by about 4 bits with a standard deviation of about 1.5. As theorized, the near 4 hamming distance in bytes translated to a 7.877 pairwise hamming distance in the passwords with negligibly small standard deviation which is a huge indicator of randomness.Nearly every password differs from every other in 7 or 8 positions—i.e. they are highly diverse character-wise.
These results imply that the password generator is truly random as expected from ring oscillators since sequences were generated at same times under exactly same temperature, ambient noise, and electrical noise.
5.Conclusion
In this project, I built and tested a true random number generator (TRNG) using arrays of ring oscillators for a hardware-based password manager. By taking advantage of the natural jitter in oscillator frequencies, the TRNG was able to generate high-entropy bitstreams with very little hardware overhead. The average Hamming distance came out to 7.86 out of 8, showing that the randomness was nearly perfect.
The test results clearly show that ring oscillator jitter is a solid source of entropy for generating random seeds. Everything runs in real time on the microcontroller (MCU) and configurable logic block (CLB), so there’s no need for external entropy sources or heavy post-processing. This all-in-one, portable setup makes it more secure against cyber attacks, making it a great fit for things like crypto wallets, banking passwords, or as a hardware key for access control.
Looking ahead, I plan to scale the design to support longer passwords and fine-tune some of the system’s hyper parameters for even better performance. Future upgrades might include a knob (like a potentiometer) to store and choose between multiple passwords, and even a fingerprint scanner to add biometric security. That way, even if someone gets both the device and the host computer, they still won’t be able to access the stored passwords.
Lastly, I’ll explore adding a whitening or debiasing method—like the Von Neumann algorithm—to see how it affects the quality of the output by comparing heatmaps. Overall, the results show that TRNGs based on ring oscillator jitter are a strong, efficient, and practical solution for secure password generation in hardware.
I highly recommend reading the paper attached below for more in-depth analysis on the project and algorithm descriptions.
