8051 question

[Eeyore]

I recall seeing some info ages back in one of the many data sheets for
one of the 8051 variants, some info about the power-on (reset) condition
for the port output states.

I don't see it in Atmel's 89S52 data sheet. It has the SFR power-on
values only AFAICS.

Is it my imagination that the output states are defined ?

Graham

 

[mpm]

I recall seeing some info ages back in one of the many data sheets for
one of the 8051 variants, some info about the power-on (reset) condition
for the port output states.

I don't see it in Atmel's 89S52 data sheet. It has the SFR power-on
values only AFAICS.

Is it my imagination that the output states are defined ?

Graham

I "think" they're all ones, except for Port-0 which is open-drain. (?)
Total guess from memory, and it's midnight here so.....

I you don't have an 89S52 handy, I can plop one on a protoboard
tomorrow and meter it for you.
No software, just a blank 89S52 and a crystal. Let me know. -mpm

 

[Eeyore]

Eeyore wrote



I "think" they're all ones,

That was what I thought too but I can't recall why now !

except for Port-0 which is open-drain. (?)
Yup.


Total guess from memory, and it's midnight here so.....

I you don't have an 89S52 handy, I can plop one on a protoboard
tomorrow and meter it for you.
No software, just a blank 89S52 and a crystal. Let me know. -mpm

Thanks for the offer. That would be handy actually.

I actually do have one but I'm tied up with pcb layout right now

Graham

 

[TT_Man]

I recall seeing some info ages back in one of the many data sheets for
one of the 8051 variants, some info about the power-on (reset) condition
for the port output states.

I don't see it in Atmel's 89S52 data sheet. It has the SFR power-on
values only AFAICS.

Is it my imagination that the output states are defined ?

Graham

They are all high on reset.

 

[Mook Johnson]

That was what I thought too but I can't recall why now !



Thanks for the offer. That would be handy actually.

I actually do have one but I'm tied up with pcb layout right now

Graham

Yup,

The old intel 80C51 had all port outputs (dont know about port 0) high while
reset is aserted. I found that out by haveing a relay driver attached to
one port pin and kept hearing clicking during power up. The relay was
holding back 250DC so my motor driver was getting a 250mS blip of HV on
power up. .

Had to flip it over to negative logic. Ahhh the lessons from the younger
years.

 

[Eeyore]

They are all high on reset.

Thank you kindly. I did find a note in a Philips datasheet for the 89C52 that
referred to a specific power-on condition existing but it wasn't stated what
it was !

Graham

 

[Eeyore]

Yup,

The old intel 80C51 had all port outputs (dont know about port 0) high while
reset is aserted. I found that out by haveing a relay driver attached to
one port pin and kept hearing clicking during power up. The relay was
holding back 250DC so my motor driver was getting a 250mS blip of HV on
power up. .

Had to flip it over to negative logic. Ahhh the lessons from the younger
years.

That's EXACTLY the kind of thing I wanted to avoid. There are several highish
power loads it's going to be controlling.

Graham

 

[Anthony Fremont]

I recall seeing some info ages back in one of the many data sheets for
one of the 8051 variants, some info about the power-on (reset)
condition for the port output states.

I don't see it in Atmel's 89S52 data sheet. It has the SFR power-on
values only AFAICS.

The SFR reset values are clearly specified in the datasheet _and_ the 89S52
doesn't have an output direction register. As long as some external device
isn't pulling a pin low, how could it possibly not match the SFR value?

Is it my imagination that the output states are defined ?

LOL What kind of microcontroller would come out of reset with undefined pin
states?

 

[petrus bitbyter]

I recall seeing some info ages back in one of the many data sheets for
one of the 8051 variants, some info about the power-on (reset) condition
for the port output states.

I don't see it in Atmel's 89S52 data sheet. It has the SFR power-on
values only AFAICS.

Is it my imagination that the output states are defined ?

Graham

Put some info on ABSE.

petrus bitbyter

 

[Spehro Pefhany]

That's EXACTLY the kind of thing I wanted to avoid. There are several highish
power loads it's going to be controlling.

Graham

It's because of those awful pseudo-bidrectional ports-- to be "inputs"
they have to come up "sort of" high. Worse even than being high, they
have only a bit of drive so they might half turn on a driver and allow
it to heat up. 8051 variants that have real bidirectional ports don't
generally have that problem. You can use a PNP transistor or digital
transistor connected to Vdd to get around the problem.




Best regards,
Spehro Pefhany

 

[Henry Kiefer]

I recall seeing some info ages back in one of the many data sheets for
one of the 8051 variants, some info about the power-on (reset) condition
for the port output states.

I don't see it in Atmel's 89S52 data sheet. It has the SFR power-on
values only AFAICS.

Is it my imagination that the output states are defined ?

If it is one of the internal dynamic working types (at least the old
NMOS variants), the control lines stay low as long as the oscillator is
starting (is below the internal switch threshold). The nasty effect is a
transient write to external memory address zero!


- Henry

 

[Eeyore]

The SFR reset values are clearly specified in the datasheet _and_ the 89S52
doesn't have an output direction register.

Eh ? Which output direction register ?

As long as some external device
isn't pulling a pin low, how could it possibly not match the SFR value?

Silly me. There I was thinking it specified the SPECIAL function registers
only. Yes, I see them now.

Graham

 

[Eeyore]

Put some info on ABSE.

It's all sorted now.

Graham

 

[Eeyore]

If it is one of the internal dynamic working types (at least the old
NMOS variants), the control lines stay low as long as the oscillator is
starting (is below the internal switch threshold). The nasty effect is a
transient write to external memory address zero!

The 89S52 is a static design. It seems that all the modern variants have
become static parts.

Graham

 

[Anthony Fremont]

Eh ? Which output direction register ?

My point was that there isn't one on the 805x, so the only thing to be
concerned about is the reset value for the SFR (well....excepting any pins
on some freakish 805x variant that might come out of reset with the port
pins attached to an internal peripheral). Some PICs do this and some port
pins are high-Z after a reset.

Silly me. There I was thinking it specified the SPECIAL function
registers only. Yes, I see them now.

For all intents and purposes, the i/o ports are SPECIAL function registers,
no?

 

[Henry Kiefer]

The 89S52 is a static design. It seems that all the modern variants have
become static parts.

I cannot speak for the CMOS variants because I never investigated the
(possible) problem there.


- Henry

 

[Henry Kiefer]

My point was that there isn't one on the 805x, so the only thing to be
concerned about is the reset value for the SFR (well....excepting any pins
on some freakish 805x variant that might come out of reset with the port
pins attached to an internal peripheral). Some PICs do this and some port
pins are high-Z after a reset.

BTW: IF your'e in the external ROM mode: You can overwrite the RD und WR
pin via the SFR for doing unusual bus protocol...

- Henry

 

[Robert Baer]

It's because of those awful pseudo-bidrectional ports-- to be "inputs"
they have to come up "sort of" high. Worse even than being high, they
have only a bit of drive so they might half turn on a driver and allow
it to heat up. 8051 variants that have real bidirectional ports don't
generally have that problem. You can use a PNP transistor or digital
transistor connected to Vdd to get around the problem.




Best regards,
Spehro Pefhany

Oh...i like *analog* transistors better...

 

[Pieter]

If it is one of the internal dynamic working types (at least the old
NMOS variants), the control lines stay low as long as the oscillator is
starting (is below the internal switch threshold). The nasty effect is a
transient write to external memory address zero!


- Henry

That is why I had to place an unused variable in my code at address 0.
Solved the problem.

Pieter

 

[Henry Kiefer]

That is why I had to place an unused variable in my code at address 0.
Solved the problem.

Pieter

;-)
Unfortunately, software guys tend to place memory space to the lower end...

We can see that Intel never rigorous tested the switch-on behaviour of
the 8051 architecture. Or must be very ignorant.


- Henry