5mW boost converter

[[email protected]]

Joerg wrote...

Strange, I have used the CD40106 as well as the 74HC14 in low
power PWM converters without any problems. They are both Schmitts,
meaning they won't dwell in the crossover phase any longer than
their switching speed lets them.
[ snip ]
Look at the Philips spec for the 74HC14, page 9, 5th line item:
http://www.semiconductors.philips.com/acrobat_download/datasheets/74HC_HCT14_3.pdf
30uA typical, and an oscillator doesn't spend a whole long time
at that very spot.

Not quite. Yes, once the threshold has been reached the switching
is fast and the extra current drain stops, but as the analog input
voltage slowly approaches the threshold the class-A current is high
and going higher, reaching a maximum just at the moment of switching.
See the graphs on page 14. So one gets a much higher supply-current
hit than expected if this hasn't been considered.

Yes, Figs. 10 and 11 illustrate the problem -- in operation, the
typical one-gate R-C Schmitt oscillator's input voltage range is
exactly the most disadvantageous vis-à-vis current consumption.

The 700uA-drawing circuit 74hc132 I mentioned before used a Motorola
74hc132 quad NAND-gate with R-C feedback to one input, and a
logic-level 'enable' signal applied to the other. All other
gate-sections were disabled. Dragging out the proto, I've re-measured
it.

It draws 700uA at Vdd=3.0v, not 4.0v as previously stated. At
Vdd=4.5v, the circuit draws 2.1mA.

. 74hc132d
. +------. +--+ Output:
. enable+ >--------| --- \ | | 15mS pulse, 75Hz
. | // |O----+-----> --+ +--
. +---|--- / |
. | +------' |
. | |
. | R1 |
. | 2.2M |
. o----/\/\/\--------o
. | |
. | R2 D1 |
. | 68k In4148 |
. +--/\/\/\---|<|----+
. |
. |
. C1 -----
. 22nF -----
. |
. |
. ===
. GND

Correction: Please make that pulse frequency 75Hz at Vdd=4.5v, not
67Hz -- I didn't notice that it shifted a bit with the higher supply
voltage. (fixed above)

Regards,
James Arthur

 

[Mike Monett]

[email protected] wrote in

The 700uA-drawing circuit 74hc132 I mentioned before used a Motorola
74hc132 quad NAND-gate with R-C feedback to one input, and a
logic-level 'enable' signal applied to the other. All other
gate-sections were disabled. Dragging out the proto, I've re-measured
it.

It draws 700uA at Vdd=3.0v, not 4.0v as previously stated. At
Vdd=4.5v, the circuit draws 2.1mA.

. 74hc132d
. +------. +--+ Output:
. enable+ >--------| --- \ | | 15mS pulse, 67Hz
. | // |O----+-----> --+ +--
. +---|--- / |
. | +------' |
. | |
. | R1 |
. | 2.2M |
. o----/\/\/\--------o
. | |
. | R2 D1 |
. | 68k In4148 |
. +--/\/\/\---|<|----+
. |
. |
. C1 -----
. 22nF -----
. |
. |
. ==. GND


Idd waveform @ Vdd=4.0v

. _ ...__ 2.8mA
. /| /|
. / | / | rise/fall time = 11.4/1.6mS.
. / | / |
. / |/ |/_ ..__ 1.4mA
.
[...]

At any rate, I often end up avoiding the Schmitts for linear stuff.

Me too.

Regards,
James Arthur

Here's one with 500nA current drain at 2Hz and 6V Vdd. The output risetime
is 70uS so it needs to drive a schmitt input when used as a clock. It works
up to 300Hz. The current drain would be higher at 67Hz, but still orders of
magnitude lower than the 74hc132:

http://www.imagineeringezine.com/e-zine/lowfreq.html

The trick is to use high value load resistors instead of two mosfets in
series.

Mike Monett

 

[Joerg]

Hello Win,

[ snip ]
Look at the Philips spec for the 74HC14, page 9, 5th line item:
http://www.semiconductors.philips.com/acrobat_download/datasheets/74HC_HCT14_3.pdf
30uA typical, and an oscillator doesn't spend a whole long time
at that very spot.

Not quite. Yes, once the threshold has been reached the switching
is fast and the extra current drain stops, but as the analog input
voltage slowly approaches the threshold the class-A current is high
and going higher, reaching a maximum just at the moment of switching.
See the graphs on page 14. So one gets a much higher supply-current
hit than expected if this hasn't been considered.

Yes, if the input lingers in that range too long it's indeed quite high.
I have never really had that though, the consumption of all those CMOS
circuits was in the tens of uA, or in the single-digit uA range for
CD4000 stuff which I usually prefer for power economy unless it's too
slow or the client wants two-cell operation.

BTW, it's nice to see that parameter spec'd in the datasheet. But
one observes that a 30uA typical spec at Vcc -2.1V is not properly
at the tippy-top current peak! The stated 30uA pales in comparison
to the huge currents in figure 10 page 14, which peak at 330uA going
up and 420uA coming down. That's what we should be looking at IMHO.
The Philips graphs show that if you want 30 to 40uA current maximums
you'll have to run their 74hc14 at 2.0 volts supply! Hmm, too bad
they don't have any graphs between 2 and 4.5 volts, like 3.3 volts.

At any rate, I often end up avoiding the Schmitts for linear stuff.

I like them. When the last bit of fuel economy is to be squeezed out you
can still add a transistor up front that takes it through the transition
phases in a jiffy. Costs another inverter though because of the phase
reversal but that's less than a couple of cents.

Regards, Joerg

 

[Joerg]

Hello Mike,

Here's one with 500nA current drain at 2Hz and 6V Vdd. The output risetime
is 70uS so it needs to drive a schmitt input when used as a clock. It works
up to 300Hz. The current drain would be higher at 67Hz, but still orders of
magnitude lower than the 74hc132:

http://www.imagineeringezine.com/e-zine/lowfreq.html

The trick is to use high value load resistors instead of two mosfets in
series.

Ah, the old CD4007. Marvelous chip. But the art of designing such clever
circuits must have been lost on the younger generation and there is no
such device anywhere in a lower voltage node logic family. I wish there was.

CD doesn't cut it when all you have is one or two alkalines because the
threshold of the FETs becomes iffy. But there is nothing wrong with
placing a FET or BJT in front of an HC14, or a lower voltage family for
single cell operation. Except that it can cause expressions of disgust
in design reviews but I kind of got used to that.

Regards, Joerg

 

[Mike Monett]

Ah, the old CD4007. Marvelous chip. But the art of designing such
clever circuits must have been lost on the younger generation and
there is no such device anywhere in a lower voltage node logic family.
I wish there was.

CD doesn't cut it when all you have is one or two alkalines because
the threshold of the FETs becomes iffy. But there is nothing wrong
with placing a FET or BJT in front of an HC14, or a lower voltage
family for single cell operation. Except that it can cause expressions
of disgust in design reviews but I kind of got used to that.

Regards, Joerg

Hello Joerg,

Wouldn't the 74HC05 work just as well as the CD4007? The datasheet is
spec'd for operation at 2V Vcc :

http://www.tranzistoare.ro/datasheets/70/333832_DS.pdf

Also, I wonder what would happen if you took a low-voltage cmos inverter
and grounded Vcc. If this disabled the upper p-channel device, maybe you
could use the lower n-channel as a simple open drain inverter with a low
gate threshold voltage.

That chould really stir things up in a design review

Mike Monett

 

[Mike Monett]

Hello Joerg,

Wouldn't the 74HC05 work just as well as the CD4007? The datasheet is
spec'd for operation at 2V Vcc :

http://www.tranzistoare.ro/datasheets/70/333832_DS.pdf

Come to think of it, why does the 74HC05 even need a connection to VCC? The
spec shows ICC is 2uA!

Mike Monett

 

[Mike Monett]

Mike Monett wrote:

[...]

Wouldn't the 74HC05 work just as well as the CD4007? The datasheet is
spec'd for operation at 2V Vcc :

Also, I wonder what would happen if you took a low-voltage cmos inverter
and grounded Vcc. If this disabled the upper p-channel device, maybe you
could use the lower n-channel as a simple open drain inverter with a low
gate threshold voltage.

That chould really stir things up in a design review

Mike Monett

Answering my own questions - the 74hc05 is buffered internally, so it
would act like a plain 74hc04 around the threshold.

The confusion arises since the TI datasheet seems to imply the 74HC05
is a single inverter as the symbol shows only one device and there is
no mention of internal buffers. Fairchild shows three cascaded
inverters for the 74HC04, but they do not make a 74HC05 for comparison.

The SGS-Thompson datasheet for the 74HC05 makes everything very clear.
The device definitely has three cascaded inverters:

http://www.alldatasheet.com/datasheet-pdf/pdf/23021/STMICROELECTRONICS/74HC05.html

Answering my second question about grounding VCC, the internal buffers
would be disabled. So even if the upper output device might be turned
off, no signal could get through the chip to turn the lower device on.

So, those ideas won't work.

Mike Monett

 

[Joerg]

Hello Mike,

Answering my second question about grounding VCC, the internal buffers
would be disabled. So even if the upper output device might be turned
off, no signal could get through the chip to turn the lower device on.

Well, that's just the problem, there is nothing at all in the lower
voltage series that offers the versatility of the CD4007. You can use
some of the unbuffered devices but will have to contend with substrate
diodes, capacitive rail coupling and stuff like that. The 74HCU04 is one
example, it's just one FET pair per section.

At the end of the day a lot of my designs end up being mostly discrete.
While there are some transistor arrays these are mainly from Asian
sources and not always easy to procure.

Regards, Joerg

 

[[email protected]]

[email protected] wrote in

The 700uA-drawing circuit 74hc132 I mentioned before used a Motorola
74hc132 quad NAND-gate with R-C feedback to one input, and a
logic-level 'enable' signal applied to the other. All other
gate-sections were disabled. Dragging out the proto, I've re-measured
it.

It draws 700uA at Vdd=3.0v, not 4.0v as previously stated. At
Vdd=4.5v, the circuit draws 2.1mA.

. 74hc132d
. +------. +--+ Output:
. enable+ >--------| --- \ | | 15mS pulse, 67Hz
. | // |O----+-----> --+ +--
. +---|--- / |
. | +------' |
. | |
. | R1 |
. | 2.2M |
. o----/\/\/\--------o
. | |
. | R2 D1 |
. | 68k In4148 |
. +--/\/\/\---|<|----+
. |
. |
. C1 -----
. 22nF -----
. |
. |
. ==. GND


Idd waveform @ Vdd=4.0v

. _ ...__ 2.8mA
. /| /|
. / | / | rise/fall time = 11.4/1.6mS.
. / | / |
. / |/ |/_ ..__ 1.4mA
.

[...]


Here's one with 500nA current drain at 2Hz and 6V Vdd. The output risetime
is 70uS so it needs to drive a schmitt input when used as a clock. It works
up to 300Hz. The current drain would be higher at 67Hz, but still orders of
magnitude lower than the 74hc132:

http://www.imagineeringezine.com/e-zine/lowfreq.html

The trick is to use high value load resistors instead of two mosfets in
series.

Mike Monett

A circuit/trick/technique collector from way back, I've long enjoyed
David Johnson's site (the one you linked to).

Thanks for that nifty oscillator Mike.

James Arthur