6-layer PCB stack up

[Mr.CRC]

Hi:

I'm making a 6-layer PCB for a TI DSP, fit onto a 168-pin SDRAM DIMM
module form factor.

I'm trying to decide if I should stack the layers like:

1.
Top signal
layer 2 signal
3.3V plane
GND plane
layer 5 signal
Bottom signal

or

2.
Top signal
3.3V plane
layer 2 signal
layer 5 signal
GND plane
Bottom signal


#1 is preferable for providing a tight coupling capacitor between the
power planes, so when currents cross from top to bottom through vias,
the displacement current doesn't have to spread out as far as if the
power planes were more widely spaced.

The bad thing about #1 is that the traces on the outer and inner signal
layers, will have different transmission line impedances for the same
trace width due to differing separation distances from the power/GND
planes. It also will take more care to ensure that traces on the
adjacent signal layers don't parallel one another and get crosstalk.

#2 has consistent transmission line impedances, but the power and GND
planes are much farther apart, resulting in much more of an impedance
discontinuity for signals traversing a via from a signal layer
referencing the GND layer to a signal layer referencing the 3.3V layer
and vice/versa.

Any thoughts?

I also have to feed 1.8V to the DSP. I don't want to put any cuts in
the 3.3V layer, as all the IO from the DSP module will be at 3.3V, so I
don't want signals running over cuts in the 3.3V plane.

I'll probably put an island of copper on one of the inner signal layers
for the 1.8V distribution to the chip. Hopefully that won't tie up too
much routing real estate with at least 3 other layers available in that
area.

Only 499 airwires to go...


It's funny how much I'll fuss to make a PCB very carefully. Yet the
same chip is in a prototype system with 6 to 10 inch hookup wires
running around in free space between three PCBs, and it works fine.

There are some things that the final system will do that the proto
doesn't though, which are worth taking care about, like running the
DSP's external CPU bus to an FPGA on another DIMM card, and possibly
running the DSP and FPGA system synchronous by routing a clock from one
to the other.

 

[Nico Coesel]

Hi:

I'm making a 6-layer PCB for a TI DSP, fit onto a 168-pin SDRAM DIMM
module form factor.

I'm trying to decide if I should stack the layers like:

1.
Top signal
layer 2 signal
3.3V plane
GND plane
layer 5 signal
Bottom signal

or

2.
Top signal
3.3V plane
layer 2 signal
layer 5 signal
GND plane
Bottom signal

All 'bad'.

top signal
gnd
main power (most commonly used power supply like 1.8V)
signal
misc power (3,3V, CPU core power supplies)
signal

Never ever have 2 signal layers without a plane between them in these
kind of design.

 

[hamilton]

All 'bad'.

top signal
gnd
main power (most commonly used power supply like 1.8V)
signal
misc power (3,3V, CPU core power supplies)
signal

Never ever have 2 signal layers without a plane between them in these
kind of design.

I agree, put the gnd layer next to the part on top.
( top signal layer is also the land pattern )

EMI can also radiate from the part die, so isolate it from other signals.

On 4 layer boards I create islands of power on the third layer, under
the gnd layer.

 

[[email protected]]

All 'bad'.

Not necessarily,...

top signal
gnd
main power (most commonly used power supply like 1.8V)
signal
misc power (3,3V, CPU core power supplies)
signal

Where are your "cores" and "prepreg"? Thicknesses?

With three planes, like that, you'll have an odd stackup. You could easily
get some pretty bad warping.

Never ever have 2 signal layers without a plane between them in these
kind of design.

Not really that big of a deal, as long as the two are orthogonal to each other
and fairly constant density. The other solution is to have non-impedance-
matched signals on the levels away from the reference plane.

 

[Uwe Hercksen]

All 'bad'.

top signal
gnd
main power (most commonly used power supply like 1.8V)
signal
misc power (3,3V, CPU core power supplies)
signal

Never ever have 2 signal layers without a plane between them in these
kind of design.

Hello,

but routing of the signals might be difficult using 3 signal layers
instead of 4. It may be possible to use one signal layer for vertical
traces, one for horizontal traces and one for traces with 45 degrees
direction. But using two layers for vertical traces and one for
horizontal traces may result in crowded horizontal traces and a lot of
free space between vertical traces. It depends on the shape of the board
and the placement of the parts what configuration will be useful.

Bye

 

[Nemo]

How about two 0V planes (layers 2 and 5)? I am starting a 6 layer board
with low level signals and I am considering this option for extra
sheilding between traces. If I can get the signals and power on 4
layers, are there downsides to using 2 0V planes, like return currents
flowing in awkward ways?

 

[Nico Coesel]

Not necessarily,...


Where are your "cores" and "prepreg"? Thicknesses?

See what the PCB maker offers

With three planes, like that, you'll have an odd stackup. You could easily
get some pretty bad warping.


Not really that big of a deal, as long as the two are orthogonal to each other
and fairly constant density. The other solution is to have non-impedance-
matched signals on the levels away from the reference plane.

But no controlled impedance on two layers! In my stackup you can have
controlled impedance on any signal layer. If you use DDR memory and
connect the memory with 2 signal layers which are not seperated by a
plane it simply won't work (reliable).

 

[[email protected]]

See what the PCB maker offers

Bad plan. A decent fab should be able to make the board to your spec.

But no controlled impedance on two layers!

That depends entirely on the layout. If the layers are spare, just calculate
the impedance using the appropriate thickness. If it's dense, the wires
underneath act as a plane. If it varies a lot, you're screwed. ;-)

I almost always have a mess of signals that don't need controlled impedance
anyway.

In my stackup you can have
controlled impedance on any signal layer. If you use DDR memory and
connect the memory with 2 signal layers which are not seperated by a
plane it simply won't work (reliable).

But it'll warp, popping BGAs like popcorn.

 

[[email protected]]

How about two 0V planes (layers 2 and 5)? I am starting a 6 layer board
with low level signals and I am considering this option for extra
sheilding between traces. If I can get the signals and power on 4
layers, are there downsides to using 2 0V planes, like return currents
flowing in awkward ways?

That's a waste of a plane. Use voltage pours on one of them.

 

[Nemo]

Thank you

The "return current" and "reference plane" things are mostly myth. A
controlled-impedance trace can run adjacent to a power plane, or a
plane with multiple pours, or between planes of almost any sort.

You can get into trouble running analog signals adjacent to power pour
planes, in that power supply noise can couple into the signal traces.
In that case, ground on 2 and 5 makes sense.

 

[Nico Coesel]

Bad plan. A decent fab should be able to make the board to your spec.

If you spend loads of cash or order >1000 pieces maybe. Better go with
what is available. PCB makers offer a certain stackup for a reason:
most customers want it.

That depends entirely on the layout. If the layers are spare, just calculate
the impedance using the appropriate thickness. If it's dense, the wires
underneath act as a plane. If it varies a lot, you're screwed. ;-)

I almost always have a mess of signals that don't need controlled impedance
anyway.

Same here, but there are always a few signals that do need controlled
impedances.

But it'll warp, popping BGAs like popcorn.

Never had that problem. Sounds more like a process control problem
during soldering to me Boards are likely to warp when heating up
and cooling down during soldering are not properly controlled.

 

[[email protected]]

If you spend loads of cash or order >1000 pieces maybe. Better go with
what is available. PCB makers offer a certain stackup for a reason:
most customers want it.

No, even five, or so, panels. It's not expensive to get what you want. It is
also important to get what you ask for. If you just take whatever the fab is
selling today, you're in for some big surprises down the road.

Same here, but there are always a few signals that do need controlled
impedances.

So they go on the layers closest to the planes.

Never had that problem. Sounds more like a process control problem
during soldering to me Boards are likely to warp when heating up
and cooling down during soldering are not properly controlled.

No, it's a problem with unbalanced stresses. Any decent layout guy will try
to balance metal on opposing layers as well as possible. However, he has to
know the exact build order (where the cores are and how it's laminated).
Buying any old junk the fab happens to have laying around this week is a
recipe for disaster.

 

[Nico Coesel]

No, even five, or so, panels. It's not expensive to get what you want. It is
also important to get what you ask for. If you just take whatever the fab is
selling today, you're in for some big surprises down the road.

Its not what the fab sells today. Its what they offer as a standard.
If you want low volume and quick & cheap then pooling is the way to
go. But you have to 'make do' with what they offer which most probably
is be the best choice for most designs anyway.

 

[Mr.CRC]

The "return current" and "reference plane" things are mostly myth. A
controlled-impedance trace can run adjacent to a power plane, or a
plane with multiple pours, or between planes of almost any sort.

You can get into trouble running analog signals adjacent to power pour
planes, in that power supply noise can couple into the signal traces.
In that case, ground on 2 and 5 makes sense.

And in another post:

Signals cruise right over plane cuts and never notice. We usually run
several voltages on a power plane, and run matched-impedance traces on
adjacent layers.

To say that "return current" is a myth, flies in the face of
considerable research, modeling, and empirical evidence. Not to mention
the simple fact that circuits must be complete in order for any current
to flow.

So perhaps you could elaborate on exactly what you mean?


As I understand, and this seems to be backed up by many papers, and even
a few visual demonstrations, is that return current does indeed flow
under a trace, in the nearest plane. If that signal hops to another
layer which is closer to another plane, then the return current must
also hop. It may do so through the distributed capacitance, through
stitching vias (which can only be applied between planes which are
equipotential at DC) or through bypass caps.

For signals switching between different DC voltage planes, then it is
usually a combination of distributed capacitance and nearby bypass caps
that accommodate the return current traversal between the planes,
depending on frequency, the inductance of the bypass cap connections,
and the spacing of the planes.

Every traversal represents an impedance discontinuity. An analogous
situation would be to take a coax cable, and cut the shield all the way
around, leaving a gap of about 1 mm.

You certainly wouldn't propose that such an interrupted cable functions
normally?

It could be made to behave similarly to a PCB trace running over a slot
or switching reference planes by taking a piece of hookup wire with a
loop area large relative to the Z0 of the cable at a particular
frequency, and soldering the two pieces of shield back together with the
wire loop. Now we should be able to agree that the cable can once again
carry DC current, but isn't its AC performance horribly degraded?

To say that these phenomena do not occur contradicts significant
evidence to the contrary, such as what might be quickly revealed by a
simple Google of "pcb trace return current"

Additionally, when a trace crosses a cut in a plane the return current
must go around the cut.

I suspect what you are trying to say is that only under rare
circumstances, the effects of allowing signals to jump layers and pass
over cuts in planes is not deleterious enough to matter.

However, this would require qualifications with some sort of objective
criteria.

Frankly, considering the amount of work you do with high speed signals,
it surprises me that you make these statements, and that your work
doesn't demand highly critical application of the techniques which you
claim are bunk.

It would be interesting if you had the time to contribute to the
research publications on this subject, if you have a way to show that
current thinking (and models, and empirical experiments consistent with
theory) are not entirely satisfactory.


Good day!

 

[[email protected]]

Its not what the fab sells today. Its what they offer as a standard.

What they sell as "standard" is what they can build out of the parts they have
today. If you don't specify this stuff, you're in for a big surprise.

If you want low volume and quick & cheap then pooling is the way to
go. But you have to 'make do' with what they offer which most probably
is be the best choice for most designs anyway.

It's also the way to get crap. I guess it works for hobbyists.

 

[[email protected]]

And in another post:



To say that "return current" is a myth, flies in the face of
considerable research, modeling, and empirical evidence. Not to mention
the simple fact that circuits must be complete in order for any current
to flow.

The "return current" is coupled to the ground plane. If you slice and dice
it, too, you will have problems.

 

[Nico Coesel]

What they sell as "standard" is what they can build out of the parts they have
today. If you don't specify this stuff, you're in for a big surprise.

Sorry but that is total crap. Its like saying a gas station puts
gasoline in your car this week and next week its diesel. Utter
nonsense. The company I'm referring to (Eurocircuits) has the stackups
specified on their website and they make the boards themselves in
several factories across Europe. They deliver what they promise.

Your assumptions maybe true for a shabby PCB broker who orders from
this week's favorite Chinese. I wouldn't order PCBs from such a
company to begin with.

 

[Mr.CRC]

Odd, no one has mentioned the obvious: Bite the bullet, and go for 8
layer,
The layers will be thinner, less chewed up and board's operation will
be generally quieter.

I had wanted to make it 8 layers. But it must be within 0.047 to
0.050in. My board house may be able to do 8, but their advertised max
layers for this thickness is 6. Can do 10 layers or so on 0.062in.
It's not that they can't do 8 layers, but it will probably cost a lot more.

You should breeze through EMC testing and today 8 layer is not that
much more, not really.

What's EMC testing? This will go in a metal box in a laboratory. No
need for testing. But that doesn't mean I don't care. It's just that I
don't need to pass any sort of testing with my board in some plastic
iPod case.

1 SIG1 & COMP
8 mil FR4
2 GND
10 mil prepreg
3 SIG2
8 mil FR4
4 VCC
10?? mil prepreg
5 GND
8 mil FR4
6 SIG3
10 mil prepreg
7 GND
8 mil FR4
8 SIG4 & Misc Bypass

that way smaller trace widths on the outside layers can give
controlled Zo,
being 3 layers, GND plane itself has lower impedance
Vcc & GND are close together to gain advantage of 'free' capacitance
If you need it, even SIG2 and SIG3 layers can yield fairly well
controlled Zo

Ok, Ok, Can't addd the extra layer?
Can you go to 32 mil total ? use 6 mil FR4 leftover prepreg as below:

if not:and MUST be 62 mil total:
1 SIG1 & COMP
12 mil FR4
2 SIG2 [+ necessary GNDs]
13 mil prepreg
3 GND
12 mil FR4
4 VCC
13 mil prepreg
5 SIG3 [+ necessary GNDs]
12 mil FR4
6 SIG4 & Misc

Won't be as quiet for EMC but will make connections give controlled Zo
on the surfaces, and probably work.

But I NEVER recommend separating VCC and GND planes because that often
becomes a true EMC nightmare later.

It's bad enough that the vias chew holes in the planes, so striplines
instead of being zero emanations, are more like 14 dB below the same
level of radiation signal as a microstrip, on the surface!

If this is a short run, or you're likely to make version 2, I'd
recommend going for 8 layers, the overall costs amortized can be less
total
Cost of layers versus layout time versus 'fussing' at the EMC Test lab
etc.etc.

Thanks for the input.

 

[Tim Williams]

Every traversal represents an impedance discontinuity. An analogous
situation would be to take a coax cable, and cut the shield all the way
around, leaving a gap of about 1 mm.

You certainly wouldn't propose that such an interrupted cable functions
normally?

Of course not. But you've got the dimensions wrong: the gap might be 0.25mm
(i.e., 10 mil, or even less), not 1mm. This lets out a lot less flux
already (both E and M).

Be interesting to see just how much crap gets lost over such a
discontinuity; like a scope probe with ground clip, it's not going to be
pretty by any stretch, but it's also not going to be as bad as DC intuition
suggests.

This would only be true of a board with a single, slotted ground plane,
which is silly by any measure. The correct analogy would be if you took
that injured coax cable and wrapped it with copper foil tape, so that the
shield is supported all around by a secondary ground plane. The current
flows as displacement current in the outer jacket; high frequencies will
hardly know the difference.

Very high frequencies will know the difference, on the order of slot width
~= 1/20th wavelength. Low frequencies will know as well, but that's easy,
because at low frequencies you can simply hook a wire to either side of the
gap and handle the LF current that way.

John uses many planes, and only two planes are required for operation -- a
slot in one pour, or a gap between different pours, supported beneath by
pours bridging said gap.

Tim

 

[[email protected]]

Sorry but that is total crap. Its like saying a gas station puts
gasoline in your car this week and next week its diesel. Utter
nonsense. The company I'm referring to (Eurocircuits) has the stackups
specified on their website and they make the boards themselves in
several factories across Europe. They deliver what they promise.

Only if you specify exactly what it is you're buying. You just said you take
what they give you. Make up your mind.

Your assumptions maybe true for a shabby PCB broker who orders from
this week's favorite Chinese. I wouldn't order PCBs from such a
company to begin with.

Wrong again. Even the top-tier companies will give you shit if that's what
you order. You're obviously oblivious, or wrong about what your company is
actually buying.