I've Got A Design Problem for You

[Jim Thompson]

Here's a request from a client that I'm not so sure will work...

Signals available (at PECL levels):

1056 MHz, quadrature signals available, 0° and 90°

132 MHz, quadrature signals available, 0° and 90°

(Both from synchronously clocked counters... same clock.)

Client want me to design an Image-Reject Mixer that will produce as
output at either 1188 MHz or 924 MHz, with the undesired sideband at
least 25dB down.

Filter elements are limited to R's, C's < 30pF, L's < 10nH (Q < 10).

Devices available: 32GHz fT NPN's plus 0.35u CMOS.

I think it would be better to PLL with 132 MHz as the reference and
use /7 or /9 in the feedback. My concern is that PECL signals are NOT
sinusoidal, so mixers produce a lot of excess garbaaaage ;-)

What do the lurking gurus think?

...Jim Thompson

 

[Joerg]

Jim, the PLL you mentioned sounds a whole lot simpler, lower in real
estate, along with less EMC worries. If they allow little varicap diodes,
that is.

Regards, Joerg.

 

[Jim Thompson]

Jim, the PLL you mentioned sounds a whole lot simpler, lower in real
estate, along with less EMC worries. If they allow little varicap diodes,
that is.

Regards, Joerg.

[snip]

The process actually HAS a varicap element, and the tuning range is
small; but the client is obstinate :-(

...Jim Thompson

 

[Joerg]

Jim, that leaves only two options.

One would be to do the I/Q thing with filtering and all if they really insist
so hard. It might feel like the architect who has to design an ugly house
because the client wants an ugly house.

The other would be to perform a feasibility study of both, then compare real
estate needs and a brief EMC assessment. But then they'd have to pay you for
such a study. Depending on what this is for the EMC issue may not be so
trivial.

Regards, Joerg.

 

[John Fields]

Here's a request from a client that I'm not so sure will work...

Signals available (at PECL levels):

1056 MHz, quadrature signals available, 0° and 90°

132 MHz, quadrature signals available, 0° and 90°

(Both from synchronously clocked counters... same clock.)

Client want me to design an Image-Reject Mixer that will produce as
output at either 1188 MHz or 924 MHz, with the undesired sideband at
least 25dB down.

Filter elements are limited to R's, C's < 30pF, L's < 10nH (Q < 10).

Devices available: 32GHz fT NPN's plus 0.35u CMOS.

I think it would be better to PLL with 132 MHz as the reference and
use /7 or /9 in the feedback. My concern is that PECL signals are NOT
sinusoidal, so mixers produce a lot of excess garbaaaage ;-)

What do the lurking gurus think?

 

[Tam/WB2TT]

Jim,

Does either the 1056 or 132 MHz signal have modulation on it?

Tam

Here's a request from a client that I'm not so sure will work...

....................................

 

[Charles W. Johnson Jr.]

Here's a request from a client that I'm not so sure will work...

Signals available (at PECL levels):

1056 MHz, quadrature signals available, 0° and 90°

132 MHz, quadrature signals available, 0° and 90°

(Both from synchronously clocked counters... same clock.)

Client want me to design an Image-Reject Mixer that will produce as
output at either 1188 MHz or 924 MHz, with the undesired sideband at
least 25dB down.

Filter elements are limited to R's, C's < 30pF, L's < 10nH (Q < 10).

Devices available: 32GHz fT NPN's plus 0.35u CMOS.

I think it would be better to PLL with 132 MHz as the reference and
use /7 or /9 in the feedback. My concern is that PECL signals are NOT
sinusoidal, so mixers produce a lot of excess garbaaaage ;-)

What do the lurking gurus think?

...Jim Thompson

Why would they want to lose their information? To the best of my knowledge
PECL stands for Positive Emitter Coupled Logic.

Charles

 

[Jim Thompson]

Jim,

Does either the 1056 or 132 MHz signal have modulation on it?

Tam


...................................

No, they're simple PECL logic levels.

...Jim Thompson

 

[Jim Thompson]

Why would they want to lose their information? To the best of my knowledge
PECL stands for Positive Emitter Coupled Logic.

Charles

Trying to produce a selectable CARRIER.

...Jim Thompson

 

[John Jardine]

Here's a request from a client that I'm not so sure will work...

Signals available (at PECL levels):

1056 MHz, quadrature signals available, 0° and 90°

132 MHz, quadrature signals available, 0° and 90°

(Both from synchronously clocked counters... same clock.)

Client want me to design an Image-Reject Mixer that will produce as
output at either 1188 MHz or 924 MHz, with the undesired sideband at
least 25dB down.

Filter elements are limited to R's, C's < 30pF, L's < 10nH (Q < 10).

Devices available: 32GHz fT NPN's plus 0.35u CMOS.

I think it would be better to PLL with 132 MHz as the reference and
use /7 or /9 in the feedback. My concern is that PECL signals are NOT
sinusoidal, so mixers produce a lot of excess garbaaaage ;-)

What do the lurking gurus think?

...Jim Thompson

I think I'd give my right arm for a dozen of those 32GHz transistors

 

[Charles W. Johnson Jr.]

Trying to produce a selectable CARRIER.

...Jim Thompson

So prefilter the original signals then mix the semi-sin wave you get from
the prefilters, then I assume recreate the square output wave.
I'm still unclear what exactly you're looking for but doubt mixing
unfiltered logic will get you there.

Charles.

 

[Jim Thompson]

On Tue, 13 Apr 2004 04:12:38 +0100, "John Jardine"

[snip]

I think I'd give my right arm for a dozen of those 32GHz transistors

Indeed! It's a SiGe/CMOS process ;-)

...Jim Thompson

 

[Kevin Aylward]

I agree. Although Jim is clearly an expert in general on i.c. design,
and very knowledgeable, and no one knows everything, it is a *very* bad
move to post questions under these specific circumstances to public
NG's. Sure, people often *say* they respect people for saying they don't
know, but in the *real* world, it is indeed a major negative, especially
when one is being held over as a consultant by a paying client.

Jim...what you should have done is asked a few mates offline. I can't
see anyway it can look anything but bad to clients when done in this
manner.

Kevin Aylward
[email protected]
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

 

[Winfield Hill]

Jim Thompson wrote...

The process actually HAS a varicap element, and the tuning range
is small; but the client is obstinate :-(

I'd go with the PLL approach, and you can quote me on that.

Thanks,
- Win

whill_at_picovolt-dot-com

 

[John Woodgate]

I read in sci.electronics.design that Jim Thompson
4ax.com>) about 'I've Got A Design Problem for You', on Mon, 12 Apr
2004:

My concern is that PECL signals are NOT
sinusoidal, so mixers produce a lot of excess garbaaaage ;-)

Classical solution would be to band-pass filter those signals to clean
them up and then use the conventional image-rejection circuit. But you
would need to keep the BP filters closely on tune to minimise
differential phase shift.

 

[John Woodgate]

I read in sci.electronics.design that John Fields <jfields@austininstrum

I don't know about the rest of 'em, but as far as I'm concerned, if
you've got a client and you can't figure it out for yourself you need
to come up with some bucks for the help you need.

Well, a few words on a newsgroup hardly requires bucks. But a Fred
Bloggs solution, with mural, would be worth moola.

 

[Rick]

Jim Thompson wrote...

I'd go with the PLL approach, and you can quote me on that.

Given that the process inductors are limited to such low Q values, I
suspect that the VCO's phase noise would be lousy. Close-in phase
noise on the reference may well also be a lot worse than the normal
"divided down" XTAL reference, exacerbating the noise issue.

 

[John Woodgate]

I read in sci.electronics.design that Winfield Hill

Jim Thompson wrote...

I'd go with the PLL approach, and you can quote me on that.

Due to galloping naivety, I have to ask how you can do the job with a
PLL? A reasonably short answer will suffice; I'm not asking for a design
monograph!

 

[Fred Bloggs]

Here's a request from a client that I'm not so sure will work...

Signals available (at PECL levels):

1056 MHz, quadrature signals available, 0° and 90°

132 MHz, quadrature signals available, 0° and 90°

(Both from synchronously clocked counters... same clock.)

Client want me to design an Image-Reject Mixer that will produce as
output at either 1188 MHz or 924 MHz, with the undesired sideband at
least 25dB down.

Filter elements are limited to R's, C's < 30pF, L's < 10nH (Q < 10).

Devices available: 32GHz fT NPN's plus 0.35u CMOS.

I think it would be better to PLL with 132 MHz as the reference and
use /7 or /9 in the feedback. My concern is that PECL signals are NOT
sinusoidal, so mixers produce a lot of excess garbaaaage ;-)

What do the lurking gurus think?

...Jim Thompson

I am not aware that "image reject" is a term applied to "upconversion".
Your requirement is a variation on traditional single stage
single-sideband I/Q modulation- and the sideband suppression can be
quite good. Think two mixing stages- bandlimiting the 132MHz, and
complex modulation of the two channels by a subharmonic of the 1056MHz
first- then follow with complex mix at the carrier and combine.

 

[Fred Bloggs]

Jim Thompson wrote...



I'd go with the PLL approach, and you can quote me on that.

Thanks,
- Win

whill_at_picovolt-dot-com

Dumb, dumb, dumb..who says the frequencies will remain commensurate and
the 132Hz does not itself carry information. The "client" reserves the
right to set requirements without disclosing every little detail of
their overall architecture- and the request for a straightforward SSB
modulator is clear enough.